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Line 43... |
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#include "OrpsocMain.h"
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#include "OrpsocMain.h"
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#include "Vorpsoc_top.h"
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#include "Vorpsoc_top.h"
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#include "OrpsocAccess.h"
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#include "OrpsocAccess.h"
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#include "MemoryLoad.h"
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//#if VM_TRACE
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//#include <systemc.h>
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#include <SpTraceVcdC.h>
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#include <SpTraceVcdC.h>
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//#endif
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//#include "TraceSC.h"
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//#include "TraceSC.h"
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#include "ResetSC.h"
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#include "ResetSC.h"
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#include "Or1200MonitorSC.h"
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#include "Or1200MonitorSC.h"
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#include "UartSC.h"
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#include "UartSC.h"
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Line 105... |
Line 103... |
SpTraceVcdCFile *spTraceFile;
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SpTraceVcdCFile *spTraceFile;
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int time_val;
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int time_val;
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int cmdline_name_found=0;
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int cmdline_name_found=0;
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// Executable app load variables
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int do_program_file_load = 0; // Default: we don't require a file, we use the VMEM
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char* program_file; // Old char* style for program name
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// Verilator accessor
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// Verilator accessor
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OrpsocAccess *accessor;
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OrpsocAccess *accessor;
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// Modules
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// Modules
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Vorpsoc_top *orpsoc; // Verilated ORPSoC
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Vorpsoc_top *orpsoc; // Verilated ORPSoC
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//TraceSC *trace; // Drive VCD
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MemoryLoad *memoryload; // Memory loader
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ResetSC *reset; // Generate a RESET signal
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ResetSC *reset; // Generate a RESET signal
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Or1200MonitorSC *monitor; // Handle l.nop x instructions
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Or1200MonitorSC *monitor; // Handle l.nop x instructions
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UartSC *uart; // Handle UART signals
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UartSC *uart; // Handle UART signals
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// Instantiate the Verilator model, VCD trace handler and accessor
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// Instantiate the Verilator model, VCD trace handler and accessor
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orpsoc = new Vorpsoc_top ("orpsoc");
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orpsoc = new Vorpsoc_top ("orpsoc");
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//trace = new TraceSC ("trace", orpsoc, argc, argv);
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accessor = new OrpsocAccess (orpsoc);
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accessor = new OrpsocAccess (orpsoc);
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memoryload = new MemoryLoad (accessor);
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// Instantiate the SystemC modules
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// Instantiate the SystemC modules
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reset = new ResetSC ("reset", BENCH_RESET_TIME);
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reset = new ResetSC ("reset", BENCH_RESET_TIME);
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monitor = new Or1200MonitorSC ("monitor", accessor, argc, argv);
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monitor = new Or1200MonitorSC ("monitor", accessor, memoryload, argc, argv);
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uart = new UartSC("uart"); // TODO: Probalby some sort of param
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uart = new UartSC("uart"); // TODO: Probalby some sort of param
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// Parse command line options
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// Parse command line options
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// Default is for VCD generation OFF, only turned on if specified on command line
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// Default is for VCD generation OFF, only turned on if specified on command line
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dump_start_delay = 0;
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dump_start_delay = 0;
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dump_stop_set = 0;
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dump_stop_set = 0;
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dumping_now = 0;
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dumping_now = 0;
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// Search through the command line parameters for options
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// Search through the command line parameters for options
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if (argc > 1)
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if (argc > 1)
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{
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{
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for(int i=1; i<argc; i++)
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for(int i=1; i<argc; i++)
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{
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{
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if ((strcmp(argv[i], "-d")==0) ||
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if ((strcmp(argv[i], "-d")==0) ||
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Line 158... |
Line 160... |
(strcmp(argv[i], "--endtime")==0) )
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(strcmp(argv[i], "--endtime")==0) )
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{
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{
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time_val = atoi(argv[i+1]);
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time_val = atoi(argv[i+1]);
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sc_time opt_end_time(time_val,TIMESCALE_UNIT);
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sc_time opt_end_time(time_val,TIMESCALE_UNIT);
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finish_time = opt_end_time;
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finish_time = opt_end_time;
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//if (DEBUG_TRACESC) cout << "* Commmand line opt: Sim. will end at " << finish_time.to_string() << endl;
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finish_time_set = 1;
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finish_time_set = 1;
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}
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}
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//#if VM_TRACE
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else if ( (strcmp(argv[i], "-f")==0) ||
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(strcmp(argv[i], "--program")==0) )
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{
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do_program_file_load = 1; // Enable program loading - will be done after sim init
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program_file = argv[i+1]; // Old char* style for program name
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}
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else if ( (strcmp(argv[i], "-s")==0) ||
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else if ( (strcmp(argv[i], "-s")==0) ||
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(strcmp(argv[i], "--vcdstart")==0) )
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(strcmp(argv[i], "--vcdstart")==0) )
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{
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{
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time_val = atoi(argv[i+1]);
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time_val = atoi(argv[i+1]);
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sc_time dump_start_time(time_val,TIMESCALE_UNIT);
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sc_time dump_start_time(time_val,TIMESCALE_UNIT);
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dump_start = dump_start_time;
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dump_start = dump_start_time;
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//if (DEBUG_TRACESC) cout << "* Commmand line opt: Dump start time set at " << dump_start.to_string() << endl;
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dump_start_delay = 1;
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dump_start_delay = 1;
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dumping_now = 0;
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dumping_now = 0;
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}
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}
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else if ( (strcmp(argv[i], "-t")==0) ||
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else if ( (strcmp(argv[i], "-t")==0) ||
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(strcmp(argv[i], "--vcdstop")==0) )
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(strcmp(argv[i], "--vcdstop")==0) )
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{
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{
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time_val = atoi(argv[i+1]);
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time_val = atoi(argv[i+1]);
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sc_time dump_stop_time(time_val,TIMESCALE_UNIT);
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sc_time dump_stop_time(time_val,TIMESCALE_UNIT);
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dump_stop = dump_stop_time;
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dump_stop = dump_stop_time;
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//if (DEBUG_TRACESC) cout << "* Commmand line opt: Dump stop time set at " << dump_stop.to_string() << endl;
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dump_stop_set = 1;
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dump_stop_set = 1;
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}
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}
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/* Depth setting of VCD doesn't appear to work, I think it's set during verilator script compile time */
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/* Depth setting of VCD doesn't appear to work,
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I think it's set during verilator script
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compile time */
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/* else if ( (strcmp(argv[i], "-p")==0) ||
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/* else if ( (strcmp(argv[i], "-p")==0) ||
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(strcmp(argv[i], "--vcddepth")==0) )
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(strcmp(argv[i], "--vcddepth")==0) )
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{
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{
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dump_depth = atoi(argv[i+1]);
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dump_depth = atoi(argv[i+1]);
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//if (DEBUG_TRACESC) cout << "* Commmand line opt: Dump depth set to " << dump_depth << endl;
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}*/
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}*/
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else if ( (strcmp(argv[i], "-h")==0) ||
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else if ( (strcmp(argv[i], "-h")==0) ||
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(strcmp(argv[i], "--help")==0) )
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(strcmp(argv[i], "--help")==0) )
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{
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{
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printf("\n ORPSoC Cycle Accurate model usage:\n");
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printf("\n ORPSoC Cycle Accurate model usage:\n");
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printf(" %s [-vh] [-d <file>] [-e <time>] [-s <time>] [-t <time>]",argv[0]);
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printf(" %s [-vh] [-f <file] [-d <file>] [-e <time>] [-s <time>] [-t <time>]",argv[0]);
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monitor->printSwitches();
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monitor->printSwitches();
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printf("\n\n");
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printf("\n\n");
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printf(" -h, --help\t\tPrint this help message\n");
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printf(" -h, --help\t\tPrint this help message\n");
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printf(" -e, --endtime\t\tStop the sim at this time (ns)\n");
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printf(" -e, --endtime\t\tStop the sim at this time (ns)\n");
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printf(" -f, --program\t\tLoad program from an OR32 ELF\n");
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printf(" -v, --vcdon\t\tEnable VCD generation\n");
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printf(" -v, --vcdon\t\tEnable VCD generation\n");
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printf(" -d, --vcdfile\t\tEnable and specify target VCD file name\n");
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printf(" -d, --vcdfile\t\tEnable and specify target VCD file name\n");
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printf(" -s, --vcdstart\tEnable and delay VCD generation until this time (ns)\n");
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printf(" -s, --vcdstart\tEnable and delay VCD generation until this time (ns)\n");
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printf(" -t, --vcdstop\t\tEnable and terminate VCD generation at this time (ns)\n");
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printf(" -t, --vcdstop\t\tEnable and terminate VCD generation at this time (ns)\n");
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Line 311... |
printf("* Beginning test\n");
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printf("* Beginning test\n");
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// Init the UART function
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// Init the UART function
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uart->initUart(25000000, 115200);
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uart->initUart(25000000, 115200);
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if (do_program_file_load) // Did the user specify a file to load?
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{
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cout << "* Loading program from " << program_file << endl;
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if (memoryload->loadcode(program_file,0,0) < 0)
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{
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cout << "* Error: executable file " << program_file << " not loaded" << endl;
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}
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}
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else // Load SRAM from VMEM file
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{
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accessor->do_ram_readmemh();
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}
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SIM_RUNNING = 1;
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SIM_RUNNING = 1;
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// First check how we should run the sim.
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// First check how we should run the sim.
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if (VCD_enabled || finish_time_set)
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if (VCD_enabled || finish_time_set)
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{ // We'll run sim with step
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{ // We'll run sim with step
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