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//
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//
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// Revision 1.1 2001/07/20 00:46:03 lampret
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// Revision 1.1 2001/07/20 00:46:03 lampret
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// Development version of RTL. Libraries are missing.
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// Development version of RTL. Libraries are missing.
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//
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//
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//
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//
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`include "timescale.v"
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`include "timescale.v"
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`include "or1200_defines.v"
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`include "or1200_defines.v"
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`include "orpsoc_testbench_defines.v"
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//
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//
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// Top of OR1200 inside test bench
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// Top of OR1200 inside test bench
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//
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//
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`ifndef OR1200_TOP
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`define OR1200_TOP orpsoc_testbench.dut.i_or1k.i_or1200_top
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`define OR1200_TOP orpsoc_testbench.dut.i_or1k.i_or1200_top
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`include "orpsoc_testbench_defines.v"
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`else
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`include `TESTBENCH_DEFINES
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`endif
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//
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//
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// Enable display_arch_state task
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// Enable display_arch_state task
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//
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//
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//`define OR1200_DISPLAY_ARCH_STATE
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//`define OR1200_DISPLAY_ARCH_STATE
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gpr[j+16] = `OR1200_TOP.or1200_cpu.or1200_rf.rf_a.ramb4_s16_1.mem[gpr_no*16+j];
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gpr[j+16] = `OR1200_TOP.or1200_cpu.or1200_rf.rf_a.ramb4_s16_1.mem[gpr_no*16+j];
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end
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end
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`else
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`else
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`ifdef OR1200_ARTISAN_SDP
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`ifdef OR1200_ARTISAN_SDP
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`else
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`else
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`ifdef OR1200_XILINX_RAMB16
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`ifdef legacy_model
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for(j = 0; j < 32; j = j + 1) begin
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gpr[j] = `OR1200_TOP.or1200_cpu.or1200_rf.rf_a.ramb16_s36_s36.mem[gpr_no*32+j];
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end
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`else
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gpr = `OR1200_TOP.or1200_cpu.or1200_rf.rf_a.ramb16_s36_s36.mem[gpr_no];
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`endif
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`else
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gpr = `OR1200_TOP.or1200_cpu.or1200_rf.rf_a.mem[gpr_no];
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gpr = `OR1200_TOP.or1200_cpu.or1200_rf.rf_a.mem[gpr_no];
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`endif
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`endif
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`endif
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`endif
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`endif
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`endif
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`endif
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`endif
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`endif
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end
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end
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endtask
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endtask
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//
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//
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// Write state of the OR1200 registers into a file
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// Write state of the OR1200 registers into a file
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