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https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
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Rev 397 |
Line 199... |
Line 199... |
.clk(clk),
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.clk(clk),
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.uart_tx(uart0_stx_pad_o)
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.uart_tx(uart0_stx_pad_o)
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);
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);
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// UART0 stimulus
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// UART0 stimulus
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/*
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uart_stim
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uart_stim
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#(
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#(
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.uart_baudrate_period_ns(8680) // 115200 baud = period 8.68uS
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.uart_baudrate_period_ns(8680) // 115200 baud = period 8.68uS
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)
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)
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uart0_stim
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uart0_stim
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(
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(
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.clk(clk),
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.clk(clk),
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.uart_rx(uart0_srx_pad_i)
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.uart_rx(uart0_srx_pad_i)
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);
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);
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*/
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// UART0 is looped back for now
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assign uart0_srx_pad_i = uart0_stx_pad_o;
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`endif // `ifdef UART0
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`endif // `ifdef UART0
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endmodule // orpsoc_testbench
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endmodule // orpsoc_testbench
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