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reg rx_nib_first,rx_nib_first_r; // if high, nib_0 contains the "first" of the pair of nibs
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reg rx_nib_first,rx_nib_first_r; // if high, nib_0 contains the "first" of the pair of nibs
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reg [3:0] rx_segment_begin_num;
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reg [3:0] rx_segment_begin_num;
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// Allow us to check if RX DV has been low for a while
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// Allow us to check if RX DV has been low for a while
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reg [3:0] rx_dv_long_low_sr;
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reg [3:0] rx_dv_long_low_sr;
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wire dv_long_low;
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wire rx_dv_long_low;
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always @(posedge ethphy_mii_rx_clk)
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always @(posedge ethphy_mii_rx_clk)
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rx_dv_long_low_sr[3:0] <= {rx_dv_long_low_sr[2:0], ethphy_mii_rx_dv};
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rx_dv_long_low_sr[3:0] <= {rx_dv_long_low_sr[2:0], ethphy_mii_rx_dv};
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assign rx_dv_long_low = ~(|rx_dv_long_low_sr);
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assign rx_dv_long_low = ~(|rx_dv_long_low_sr[3:0]);
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reg rx_dv;
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reg rx_dv;
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wire [8:0] rx_fifo_out;
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wire [8:0] rx_fifo_out;
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wire rx_fifo_empty,rx_fifo_almost_empty;
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wire rx_fifo_empty,rx_fifo_almost_empty;
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reg rx_fifo_pop;
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reg rx_fifo_pop;
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