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[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [vpi/] [c/] [rsp-rtl_sim.c] - Diff between revs 40 and 46

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Rev 40 Rev 46
Line 90... Line 90...
  // first thing we do  is send a command
  // first thing we do  is send a command
  // and wait for an ack
  // and wait for an ack
  int n;
  int n;
  char cmd_resp;
  char cmd_resp;
 
 
 
  if (DBG_CALLS)printf("send_command_to_vpi: cmd 0x%x \n", CMD);
 
 
  //n = write(rsp_to_vpi_pipe[1],&CMD, 1); // send the command to the sim
  //n = write(rsp_to_vpi_pipe[1],&CMD, 1); // send the command to the sim
  n = write(command_pipe[1],&CMD, 1); // send the command to the sim
  n = write(command_pipe[1],&CMD, 1); // send the command to the sim
 
 
  if (n < 0)   error("ERROR writing to VPI FIFO");
  if (n < 0)   error("ERROR writing to VPI FIFO");
Line 110... Line 111...
  // Now send address
  // Now send address
  int n;
  int n;
 
 
  char* send_buf;
  char* send_buf;
 
 
 
  if (DBG_CALLS)printf("send_address_to_vpi: address 0x%.8x\n",address);
 
 
  send_buf = (char *) &address;
  send_buf = (char *) &address;
 
 
  n = write(rsp_to_vpi_pipe[1],send_buf, 4); // send the address to the sim
  n = write(rsp_to_vpi_pipe[1],send_buf, 4); // send the address to the sim
 
 
  if (n < 0)   error("ERROR writing to VPI socket");
  if (n < 0)   error("ERROR writing to VPI socket");
Line 126... Line 129...
  // Now send data
  // Now send data
  int n;
  int n;
 
 
  char* send_buf;
  char* send_buf;
 
 
 
  if (DBG_CALLS)printf("send_data_to_vpi: data 0x%.8x\n",data);
 
 
  send_buf = (char *) &data;
  send_buf = (char *) &data;
 
 
  n = write(rsp_to_vpi_pipe[1],send_buf, 4); // Write the data to the socket
  n = write(rsp_to_vpi_pipe[1],send_buf, 4); // Write the data to the socket
 
 
  if (n < 0)   error("ERROR writing to VPI socket");
  if (n < 0)   error("ERROR writing to VPI socket");
Line 143... Line 148...
  // Now send data
  // Now send data
  int n, i;
  int n, i;
 
 
  char* send_buf;
  char* send_buf;
 
 
 
  if (DBG_CALLS)printf("send_block_data_to_vpi: len %d\n",len);
 
 
  send_buf = (char *) data;
  send_buf = (char *) data;
 
 
  n = write(rsp_to_vpi_pipe[1],send_buf, len); // Write the data to the fifo
  n = write(rsp_to_vpi_pipe[1],send_buf, len); // Write the data to the fifo
 
 
  if (n < 0)   error("ERROR writing to VPI socket");
  if (n < 0)   error("ERROR writing to VPI socket");
Line 188... Line 195...
 
 
  recv_buf = (char *) data;
  recv_buf = (char *) data;
 
 
  n=0;
  n=0;
 
 
 
  if (DBG_CALLS)printf("rsp_rtl_sim: get_block_data_from_vpi len %d\n",len);
 
 
  while (n < len)
  while (n < len)
    {
    {
 
 
      status = read(vpi_to_rsp_pipe[0], recv_buf, len - n); // block and wait for the data
      status = read(vpi_to_rsp_pipe[0], recv_buf, len - n); // block and wait for the data
 
 
Line 199... Line 208...
 
 
    }
    }
 
 
 
 
  if (DBG_VPI){
  if (DBG_VPI){
    printf("rsp-rtl_sim: get_block_data_from_vpi: %d bytes",len);
    printf("rsp-rtl_sim: get_block_data_from_vpi: %d bytes: ",len);
    for (i = 0;i < (len/4); i++)
    for (i = 0;i < (len); i++)
      {
      {
        printf("0x%.8x ",data[i]);
        if ((i%12) == 0) printf("\n\t");
 
        printf("%.2x",recv_buf[i]);
 
        if ((i%3) == 0) printf(" ");
 
 
      }
      }
    printf("\n");
    printf("\n");
  }
  }
 
 
  return;
  return;
Line 219... Line 231...
  // by blocking wait on recv
  // by blocking wait on recv
 
 
  int n = 0;
  int n = 0;
  char tmp;
  char tmp;
 
 
 
  if (DBG_CALLS)printf("get_response_from_vpi\n");
 
 
  n = read(vpi_to_rsp_pipe[0],&tmp,1); // block and wait
  n = read(vpi_to_rsp_pipe[0],&tmp,1); // block and wait
 
 
  return;
  return;
}
}
 
 
/* Resets JTAG
 
   Writes TRST=0
 
   and    TRST=1 */
 
static void jp2_reset_JTAG() {
static void jp2_reset_JTAG() {
  int i;
  int i;
 
 
  debug2("\nreset(");
  debug2("\nreset(");
 
 
Line 308... Line 319...
  debug2("dbg_set_chain %d\n", chain);
  debug2("dbg_set_chain %d\n", chain);
 
 
  if (current_chain == chain)
  if (current_chain == chain)
    return DBG_ERR_OK;
    return DBG_ERR_OK;
 
 
 
  if (DBG_CALLS)printf("dbg_set_chain chain %d \n", chain);
 
 
  dbg_chain = chain;
  dbg_chain = chain;
 
 
  send_command_to_vpi(CMD_SET_DEBUG_CHAIN);
  send_command_to_vpi(CMD_SET_DEBUG_CHAIN);
 
 
  send_data_to_vpi(chain);
  send_data_to_vpi(chain);
Line 328... Line 341...
{
{
 
 
  debug("\n");
  debug("\n");
  debug2("ctrl\n");
  debug2("ctrl\n");
 
 
 
  if (DBG_CALLS)printf("dbg_ctrl: reset %d stall %d \n", reset, stall);
 
 
  dbg_set_chain(dbg_chain);
  dbg_set_chain(dbg_chain);
 
 
  send_command_to_vpi(CMD_CPU_CTRL_WR);
  send_command_to_vpi(CMD_CPU_CTRL_WR);
 
 
  //send_data_to_vpi(((reset & 0x1) | ((stall&0x1)<<1)));
  //send_data_to_vpi(((reset & 0x1) | ((stall&0x1)<<1)));
Line 351... Line 366...
  dbg_set_chain(dbg_chain);
  dbg_set_chain(dbg_chain);
 
 
  debug("\n");
  debug("\n");
  debug2("ctrl\n");
  debug2("ctrl\n");
 
 
 
  if (DBG_CALLS)printf("dbg_ctrl_read\n");
 
 
  dbg_set_chain(dbg_chain);
  dbg_set_chain(dbg_chain);
 
 
  send_command_to_vpi(CMD_CPU_CTRL_RD);
  send_command_to_vpi(CMD_CPU_CTRL_RD);
 
 
  get_data_from_vpi((uint32_t *)&resp);
  get_data_from_vpi((uint32_t *)&resp);
Line 371... Line 388...
}
}
 
 
/* read a word from wishbone */
/* read a word from wishbone */
int dbg_wb_read32(uint32_t adr, uint32_t *data)
int dbg_wb_read32(uint32_t adr, uint32_t *data)
{
{
  //uint32_t resp;
  if (DBG_CALLS)printf("dbg_wb_read32: adr 0x%.8x \n",adr);
 
 
  dbg_set_chain(DC_WISHBONE);
  dbg_set_chain(DC_WISHBONE);
 
 
  send_command_to_vpi(CMD_WB_RD32);
  send_command_to_vpi(CMD_WB_RD32);
 
 
Line 390... Line 407...
 
 
/* write a word to wishbone */
/* write a word to wishbone */
int dbg_wb_write32(uint32_t adr, uint32_t data)
int dbg_wb_write32(uint32_t adr, uint32_t data)
{
{
 
 
 
  if (DBG_CALLS)printf("dbg_wb_write32: adr 0x%.8x data 0x%.8x\n",adr, data);
 
 
 
  dbg_set_chain(DC_WISHBONE);
 
 
 
  send_command_to_vpi(CMD_WB_WR);
 
 
 
  send_address_to_vpi(adr);
 
 
 
  send_data_to_vpi(sizeof(data));
 
 
 
  send_data_to_vpi(data);
 
 
 
  get_response_from_vpi();
 
 
 
  return 0;
 
}
 
 
 
/* write a hword to wishbone */
 
int dbg_wb_write16(uint32_t adr, uint16_t data)
 
{
 
 
 
  if (DBG_CALLS)printf("dbg_wb_write16: adr 0x%.8x data 0x%.4x\n",adr, data);
 
 
 
  dbg_set_chain(DC_WISHBONE);
 
 
 
  send_command_to_vpi(CMD_WB_WR);
 
 
 
  send_address_to_vpi(adr);
 
 
 
  send_data_to_vpi(sizeof(data));
 
 
 
  send_data_to_vpi(data);
 
 
 
  get_response_from_vpi();
 
 
 
  return 0;
 
}
 
 
 
/* write a word to wishbone */
 
int dbg_wb_write8(uint32_t adr, uint8_t data)
 
{
 
 
 
  if (DBG_CALLS)printf("dbg_wb_write8: adr 0x%.8x data 0x%.2x\n",adr, data);
 
 
  dbg_set_chain(DC_WISHBONE);
  dbg_set_chain(DC_WISHBONE);
 
 
  send_command_to_vpi(CMD_WB_WR32);
  send_command_to_vpi(CMD_WB_WR);
 
 
  send_address_to_vpi(adr);
  send_address_to_vpi(adr);
 
 
 
  send_data_to_vpi(sizeof(data));
 
 
  send_data_to_vpi(data);
  send_data_to_vpi(data);
 
 
  get_response_from_vpi();
  get_response_from_vpi();
 
 
  return 0;
  return 0;
}
}
 
 
 
 
/* read a block from wishbone */
/* read a block from wishbone */
int dbg_wb_read_block32(uint32_t adr, uint32_t *data, int len)
int dbg_wb_read_block32(uint32_t adr, uint32_t *data, int len)
{
{
 
 
  // len is in B Y T E S ! !
  // len is in B Y T E S ! !
 
 
  if (DBG_VPI) printf("rsp-rtl_sim: block read len: %d from addr: 0x%.8x\n",len, adr);
  if (DBG_VPI) printf("xbrsp-rtl_sim: block read len: %d from addr: 0x%.8x\n",len, adr);
 
 
  dbg_set_chain(DC_WISHBONE);
  dbg_set_chain(DC_WISHBONE);
 
 
  send_command_to_vpi(CMD_WB_BLOCK_RD32);
  send_command_to_vpi(CMD_WB_BLOCK_RD32);
 
 
Line 430... Line 494...
 
 
/* write a block to wishbone */
/* write a block to wishbone */
int dbg_wb_write_block32(uint32_t adr, uint32_t *data, int len)
int dbg_wb_write_block32(uint32_t adr, uint32_t *data, int len)
{
{
 
 
 
  if (DBG_CALLS)printf("dbg_wb_block32: adr 0x%.8x len %d bytes\n",adr, len);
 
 
  dbg_set_chain(DC_WISHBONE);
  dbg_set_chain(DC_WISHBONE);
 
 
  send_command_to_vpi(CMD_WB_BLOCK_WR32);
  send_command_to_vpi(CMD_WB_BLOCK_WR32);
 
 
  send_data_to_vpi(adr);
  send_data_to_vpi(adr);
Line 449... Line 515...
 
 
/* read a register from cpu */
/* read a register from cpu */
int dbg_cpu0_read(uint32_t adr, uint32_t *data)
int dbg_cpu0_read(uint32_t adr, uint32_t *data)
{
{
 
 
 
  if (DBG_CALLS)printf("dbg_cpu0_read: adr 0x%.8x\n",adr);
 
 
  dbg_set_chain(DC_CPU0);
  dbg_set_chain(DC_CPU0);
 
 
  send_command_to_vpi(CMD_CPU_RD_REG);
  send_command_to_vpi(CMD_CPU_RD_REG);
 
 
  send_address_to_vpi(adr);
  send_address_to_vpi(adr);
Line 467... Line 535...
 
 
/* write a cpu register */
/* write a cpu register */
int dbg_cpu0_write(uint32_t adr, uint32_t data)
int dbg_cpu0_write(uint32_t adr, uint32_t data)
{
{
 
 
  uint32_t resp;
  if (DBG_CALLS)printf("dbg_cpu0_write: adr 0x%.8x\n",adr);
 
 
  dbg_set_chain(DC_CPU0);
  dbg_set_chain(DC_CPU0);
 
 
  send_command_to_vpi(CMD_CPU_WR_REG);
  send_command_to_vpi(CMD_CPU_WR_REG);
 
 

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