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[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [vpi/] [c/] [rsp-vpi.h] - Diff between revs 46 and 397

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Rev 46 Rev 397
Line 53... Line 53...
// 4'h9 wb wr block 32 (inputs: address, length, data)
// 4'h9 wb wr block 32 (inputs: address, length, data)
// 4'ha wb rd block 32 (inputs: address, length; output: data)
// 4'ha wb rd block 32 (inputs: address, length; output: data)
// 4'hb reset
// 4'hb reset
// 4'hc read jtag id (output: data)
// 4'hc read jtag id (output: data)
// 4'hd GDB detach - do something (like close down, restart, etc.)
// 4'hd GDB detach - do something (like close down, restart, etc.)
 
// 4'he wb rd 8 (input: address, data pointer)
// There should be a correlating set of verilog `define's in the 
// There should be a correlating set of verilog `define's in the 
// verilog debug testbench module's include file, test_defines.v
// verilog debug testbench module's include file, vpi_debug_defines.v
 
 
#define CMD_JTAG_SET_IR 0x1
#define CMD_JTAG_SET_IR 0x1
#define CMD_SET_DEBUG_CHAIN 0x2
#define CMD_SET_DEBUG_CHAIN 0x2
#define CMD_CPU_CTRL_WR 0x3
#define CMD_CPU_CTRL_WR 0x3
#define CMD_CPU_CTRL_RD 0x4
#define CMD_CPU_CTRL_RD 0x4
Line 70... Line 70...
#define CMD_WB_BLOCK_WR32 0x9
#define CMD_WB_BLOCK_WR32 0x9
#define CMD_WB_BLOCK_RD32 0xa
#define CMD_WB_BLOCK_RD32 0xa
#define CMD_RESET 0xb
#define CMD_RESET 0xb
#define CMD_READ_JTAG_ID 0xc
#define CMD_READ_JTAG_ID 0xc
#define CMD_GDB_DETACH 0xd
#define CMD_GDB_DETACH 0xd
 
#define CMD_WB_RD8 0xe
 
 
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