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[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [vpi/] [verilog/] [vpi_debug_defines.v] - Diff between revs 46 and 397

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Rev 46 Rev 397
Line 196... Line 196...
`define CMD_WB_BLOCK_WR32        4'h9
`define CMD_WB_BLOCK_WR32        4'h9
`define CMD_WB_BLOCK_RD32        4'ha
`define CMD_WB_BLOCK_RD32        4'ha
`define CMD_RESET                4'hb
`define CMD_RESET                4'hb
`define CMD_READ_JTAG_ID         4'hc
`define CMD_READ_JTAG_ID         4'hc
`define CMD_GDB_DETACH           4'hd
`define CMD_GDB_DETACH           4'hd
 
`define CMD_WB_RD8               4'he /* Byte read is useful with a system with byte peripherals! */
// commands:
// commands:
// 4'h1 jtag set instruction register (input: instruction value)
// 4'h1 jtag set instruction register (input: instruction value)
// 4'h2 set debug chain (dbg_set_command here) (input: chain value)
// 4'h2 set debug chain (dbg_set_command here) (input: chain value)
// 4'h3 cpu_ctrl_wr (input: ctrl value (2 bits))
// 4'h3 cpu_ctrl_wr (input: ctrl value (2 bits))
// 4'h4 cpu_ctrl_rd (output: ctrl value (2bits))
// 4'h4 cpu_ctrl_rd (output: ctrl value (2bits))

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