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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [verilog/] [vpi/] [verilog/] [vpi_debug_defines.v] - Diff between revs 40 and 46

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Rev 40 Rev 46
Line 189... Line 189...
`define CMD_SET_DEBUG_CHAIN      4'h2
`define CMD_SET_DEBUG_CHAIN      4'h2
`define CMD_CPU_CTRL_WR          4'h3
`define CMD_CPU_CTRL_WR          4'h3
`define CMD_CPU_CTRL_RD          4'h4
`define CMD_CPU_CTRL_RD          4'h4
`define CMD_CPU_WR_REG           4'h5
`define CMD_CPU_WR_REG           4'h5
`define CMD_CPU_RD_REG           4'h6
`define CMD_CPU_RD_REG           4'h6
`define CMD_WB_WR32              4'h7
`define CMD_WB_WR                4'h7
`define CMD_WB_RD32              4'h8
`define CMD_WB_RD32              4'h8
`define CMD_WB_BLOCK_WR32        4'h9
`define CMD_WB_BLOCK_WR32        4'h9
`define CMD_WB_BLOCK_RD32        4'ha
`define CMD_WB_BLOCK_RD32        4'ha
`define CMD_RESET                4'hb
`define CMD_RESET                4'hb
`define CMD_READ_JTAG_ID         4'hc
`define CMD_READ_JTAG_ID         4'hc
Line 204... Line 204...
// 4'h2 set debug chain (dbg_set_command here) (input: chain value)
// 4'h2 set debug chain (dbg_set_command here) (input: chain value)
// 4'h3 cpu_ctrl_wr (input: ctrl value (2 bits))
// 4'h3 cpu_ctrl_wr (input: ctrl value (2 bits))
// 4'h4 cpu_ctrl_rd (output: ctrl value (2bits))
// 4'h4 cpu_ctrl_rd (output: ctrl value (2bits))
// 4'h5 cpu wr reg (inputs: address, data)
// 4'h5 cpu wr reg (inputs: address, data)
// 4'h6 cpu rd reg (input: address; output: data)
// 4'h6 cpu rd reg (input: address; output: data)
// 4'h7 wb wr 32 (inputs: address, data)
// 4'h7 wb wr (inputs: address, size, data)
// 4'h8 wb rd 32 (input: address; output: data)
// 4'h8 wb rd 32 (input: address; output: data)
// 4'h9 wb wr block 32 (inputs: address, length, data)
// 4'h9 wb wr block 32 (inputs: address, length, data)
// 4'ha wb rd block 32 (inputs: address, length; output: data)
// 4'ha wb rd block 32 (inputs: address, length; output: data)
// 4'hb reset
// 4'hb reset
// 4'hc read jtag id (output: data)
// 4'hc read jtag id (output: data)

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