OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [bench/] [verilog/] [include/] [eth_stim.v] - Diff between revs 411 and 439

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 411 Rev 439
Line 462... Line 462...
 
 
      reg [31:0]   txpnt_wb; // Pointer in array to where data should be
      reg [31:0]   txpnt_wb; // Pointer in array to where data should be
      reg [24:0]   txpnt_sdram; // Index in array of shorts for data in SDRAM 
      reg [24:0]   txpnt_sdram; // Index in array of shorts for data in SDRAM 
                                // part
                                // part
      reg [21:0]   buffer;
      reg [21:0]   buffer;
      reg [7:0]    sdram_byte;
      reg [7:0]    destram_byte;
      reg [31:0]   tx_len_bd;
      reg [31:0]   tx_len_bd;
 
 
      integer      i;
      integer      i,j;
      integer      failure;
      integer      failure;
      begin
      begin
         failure = 0;
         failure = 0;
 
 
         get_bd_lenstat(tx_bd_num, tx_len_bd);
         get_bd_lenstat(tx_bd_num, tx_len_bd);
Line 494... Line 494...
         txpnt_wb = {14'd0,tx_bd_addr[17:0]};
         txpnt_wb = {14'd0,tx_bd_addr[17:0]};
         txpnt_sdram = tx_bd_addr[24:0];
         txpnt_sdram = tx_bd_addr[24:0];
 
 
         // Variable we'll use for index in the PHY's TX buffer
         // Variable we'll use for index in the PHY's TX buffer
         buffer = 0; // Start of TX data
         buffer = 0; // Start of TX data
 
`ifdef RAM_WB
 
         for (i=0;i<tx_len_bd;i=i+1)
 
           begin
 
              //$display("Checking address in tx bd 0x%0h",txpnt_sdram);
 
 
 
              destram_byte = dut.ram_wb0.ram_wb_b3_0.get_byte(txpnt_sdram);
 
 
 
              phy_byte = eth_phy0.tx_mem[buffer];
 
 
 
              // Debugging output
 
              //$display("txpnt_sdram = 0x%h, destram_byte = 0x%h, buffer = 0x%h,
 
              //phy_byte = 0x%h", txpnt_sdram,  destram_byte, buffer, phy_byte);
 
 
 
              if (phy_byte !== destram_byte)
 
                begin
 
                   `TIME;
 
                   $display("*E Wrong byte (%d) of TX packet! ram = %h, phy = %h",buffer, destram_byte, phy_byte);
 
                   failure = 1;
 
                end
 
 
 
              buffer = buffer + 1;
 
 
 
              txpnt_sdram = txpnt_sdram+1;
 
 
 
           end // for (i=0;i<tx_len_bd;i=i+1)
 
`else
`ifdef VERSATILE_SDRAM
`ifdef VERSATILE_SDRAM
         for (i=0;i<tx_len_bd;i=i+1)
         for (i=0;i<tx_len_bd;i=i+1)
           begin
           begin
              //$display("Checking address in tx bd 0x%0h",txpnt_sdram);
              //$display("Checking address in tx bd 0x%0h",txpnt_sdram);
 
 
              sdram0.get_byte(txpnt_sdram,sdram_byte);
              sdram0.get_byte(txpnt_sdram,destram_byte);
 
 
              phy_byte = eth_phy0.tx_mem[buffer];
              phy_byte = eth_phy0.tx_mem[buffer];
              // Debugging output
              // Debugging output
              //$display("txpnt_sdram = 0x%h, sdram_byte = 0x%h, buffer = 0x%h, phy_byte = 0x%h", txpnt_sdram,  sdram_byte, buffer, phy_byte);
              //$display("txpnt_sdram = 0x%h, destram_byte = 0x%h, buffer = 0x%h, phy_byte = 0x%h", txpnt_sdram,  destram_byte, buffer, phy_byte);
              if (phy_byte !== sdram_byte)
              if (phy_byte !== destram_byte)
                begin
                begin
                   `TIME;
                   `TIME;
                   $display("*E Wrong byte (%d) of TX packet! ram = %h, phy = %h",buffer, sdram_byte, phy_byte);
                   $display("*E Wrong byte (%d) of TX packet! ram = %h, phy = %h",buffer, destram_byte, phy_byte);
                   failure = 1;
                   failure = 1;
                end
                end
 
 
              buffer = buffer + 1;
              buffer = buffer + 1;
 
 
              txpnt_sdram = txpnt_sdram+1;
              txpnt_sdram = txpnt_sdram+1;
 
 
           end // for (i=0;i<tx_len_bd;i=i+1)
           end // for (i=0;i<tx_len_bd;i=i+1)
 
 
`else
 `else // !`ifdef VERSATILE_SDRAM
         $display("SET ME UP TO LOOK IN ANOTHER MEMORY!");
 
 
         $display("eth_stim.v: CANNOT INSPECT RAM. PLEASE CONFIGURE CORRECTLY");
         $display("RAM pointer for BD is 0x%h, bank offset we'll use is 0x%h",
         $display("RAM pointer for BD is 0x%h, bank offset we'll use is 0x%h",
                  tx_bd_addr, txpnt_wb);
                  tx_bd_addr, txpnt_wb);
         $finish;
         $finish;
`endif // !`ifdef VERSATILE_SDRAM
`endif // !`ifdef VERSATILE_SDRAM
 
`endif // !`ifdef RAM_WB         
 
 
         if (failure)
         if (failure)
           begin
           begin
              #100
              #100
                `TIME;
                `TIME;
              $display("*E Error transmitting packet %0d (%0d bytes). Finishing simulation", num_tx_packets, tx_len_bd);
              $display("*E Error transmitting packet %0d (%0d bytes). Finishing simulation", num_tx_packets, tx_len_bd);
Line 961... Line 990...
      reg [7:0]    phy_byte;
      reg [7:0]    phy_byte;
 
 
      reg [31:0]   rxpnt_wb; // Pointer in array to where data should be
      reg [31:0]   rxpnt_wb; // Pointer in array to where data should be
      reg [24:0]   rxpnt_sdram; // byte address from CPU in RAM
      reg [24:0]   rxpnt_sdram; // byte address from CPU in RAM
      reg [15:0]   sdram_short;
      reg [15:0]   sdram_short;
      reg [7:0]    sdram_byte;
      reg [7:0]    destram_byte;
      //reg [7:0]    phy_rx_mem [0:2000];
 
 
 
      integer      i;
      integer      i;
      integer      failure;
      integer      failure;
 
 
      begin
      begin
Line 1001... Line 1029...
         // the offset from the base of the memory bank
         // the offset from the base of the memory bank
 
 
         rxpnt_wb = {14'd0,rx_bd_addr[17:0]};
         rxpnt_wb = {14'd0,rx_bd_addr[17:0]};
         rxpnt_sdram = rx_bd_addr[24:0];
         rxpnt_sdram = rx_bd_addr[24:0];
 
 
 
 
 
`ifdef RAM_WB
 
         for (i=0;i<len;i=i+1)
 
           begin
 
 
 
              destram_byte = dut.ram_wb0.ram_wb_b3_0.get_byte(rxpnt_sdram);
 
 
 
              phy_byte = eth_rx_sent_circbuf[eth_rx_sent_circbuf_read_ptr];
 
 
 
              if (phy_byte !== destram_byte)
 
                begin
 
                   $display("*E Wrong byte (%5d) of RX packet %5d! phy = %h, ram = %h",
 
                            i, eth_rx_num_packets_checked, phy_byte, destram_byte);
 
                   failure = 1;
 
                end
 
 
 
              eth_rx_sent_circbuf_read_ptr = (eth_rx_sent_circbuf_read_ptr+1)&
 
                                             eth_rx_sent_circbuf_size_mask;
 
 
 
              rxpnt_sdram = rxpnt_sdram+1;
 
 
 
           end
 
`else
`ifdef VERSATILE_SDRAM
`ifdef VERSATILE_SDRAM
         // We'll look inside the SDRAM array
         // We'll look inside the SDRAM array
         // Hard coded for the SDRAM buffer area to be from the halfway mark in
         // Hard coded for the SDRAM buffer area to be from the halfway mark in
         // memory (so starting in Bank2)
         // memory (so starting in Bank2)
         // We'll be passed the offset from the beginning of the buffer area
         // We'll be passed the offset from the beginning of the buffer area
Line 1014... Line 1065...
 
 
 
 
         for (i=0;i<len;i=i+1)
         for (i=0;i<len;i=i+1)
           begin
           begin
 
 
              sdram0.get_byte(rxpnt_sdram,sdram_byte);
              sdram0.get_byte(rxpnt_sdram,destram_byte);
 
 
              phy_byte = eth_rx_sent_circbuf[eth_rx_sent_circbuf_read_ptr];//phy_rx_mem[buffer]; //eth_phy0.rx_mem[buffer];
              phy_byte = eth_rx_sent_circbuf[eth_rx_sent_circbuf_read_ptr];//phy_rx_mem[buffer]; //eth_phy0.rx_mem[buffer];
 
 
              if (phy_byte !== sdram_byte)
              if (phy_byte !== destram_byte)
                begin
                begin
//                 `TIME;                 
//                 `TIME;                 
                   $display("*E Wrong byte (%5d) of RX packet %5d! phy = %h, ram = %h",
                   $display("*E Wrong byte (%5d) of RX packet %5d! phy = %h, ram = %h",
                            i, eth_rx_num_packets_checked, phy_byte, sdram_byte);
                            i, eth_rx_num_packets_checked, phy_byte, destram_byte);
                   failure = 1;
                   failure = 1;
                end
                end
 
 
              eth_rx_sent_circbuf_read_ptr = (eth_rx_sent_circbuf_read_ptr+1)&
              eth_rx_sent_circbuf_read_ptr = (eth_rx_sent_circbuf_read_ptr+1)&
                                             eth_rx_sent_circbuf_size_mask;
                                             eth_rx_sent_circbuf_size_mask;
Line 1034... Line 1085...
              rxpnt_sdram = rxpnt_sdram+1;
              rxpnt_sdram = rxpnt_sdram+1;
 
 
           end // for (i=0;i<len;i=i+2)
           end // for (i=0;i<len;i=i+2)
`else
`else
 
 
         $display("SET ME UP TO LOOK IN ANOTHER MEMORY!");
         $display("eth_stim.v: CANNOT INSPECT RAM. PLEASE CONFIGURE CORRECTLY");
         $display("RAM pointer for BD is 0x%h, bank offset we'll use is 0x%h",
         $display("RAM pointer for BD is 0x%h, bank offset we'll use is 0x%h",
                  rx_bd_addr, rxpnt_wb);
                  rx_bd_addr, rxpnt_wb);
         $finish;
         $finish;
 
 
 
 
`endif // !`ifdef VERSATILE_SDRAM
`endif // !`ifdef VERSATILE_SDRAM
 
`endif // !`ifdef RAM_WB
 
 
 
 
         if (failure)
         if (failure)
           begin
           begin
              #100
              #100
                `TIME;
                `TIME;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.