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# Makefile is stripped out only to build SDR_16 controller.
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VERSATILE_FIFO_PROJECT_FILES =versatile_fifo_dual_port_ram.v
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VERSATILE_FIFO_PROJECT_FILES =versatile_fifo_dual_port_ram.v
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VERSATILE_FIFO_PROJECT_FILES +=versatile_fifo_async_cmp.v
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VERSATILE_FIFO_PROJECT_FILES +=versatile_fifo_async_cmp.v
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VERSATILE_FIFO_PROJECT_FILES +=dff_sr.v
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VERSATILE_FIFO_PROJECT_FILES +=dff_sr.v
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VERSATILE_FIFO_PROJECT_FILES +=async_fifo_mq.v
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VERSATILE_FIFO_PROJECT_FILES +=async_fifo_mq.v
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VERSATILE_FIFO_PROJECT_FILES +=async_fifo_mq_md.v
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VERSATILE_FIFO_PROJECT_FILES +=async_fifo_mq_md.v
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./versatile_counter_generator.php $^ > $@
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./versatile_counter_generator.php $^ > $@
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fifo_fill.v: fifo_fill.fzm
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fifo_fill.v: fifo_fill.fzm
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perl fizzim.pl -encoding onehot < fifo_fill.fzm > fifo_fill.v
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perl fizzim.pl -encoding onehot < fifo_fill.fzm > fifo_fill.v
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ddr_16_generated.v: ddr_16.fzm ddr_16_defines.v
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#ddr_16_generated.v: ddr_16.fzm ddr_16_defines.v
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perl fizzim.pl -encoding onehot < ddr_16.fzm > $@
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# perl fizzim.pl -encoding onehot < ddr_16.fzm > $@
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ddr_16.v: ddr_16_generated.v
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#ddr_16.v: ddr_16_generated.v
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vppreproc --simple $^ > $@
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# vppreproc --simple $^ > $@
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#fifo_adr_counter.v:
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#fifo_adr_counter.v:
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# @echo;echo "\tThis file,"$@", doesn't exist, is it still needed?!. \n\tMake will now stop";echo
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# @echo;echo "\tThis file,"$@", doesn't exist, is it still needed?!. \n\tMake will now stop";echo
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# ls notexisting
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# ls notexisting
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VERSATILE_MEM_CTRL_IP_FILES=versatile_fifo_async_cmp.v async_fifo_mq.v versatile_fifo_dual_port_ram_dc_dw.v ctrl_counter.v fifo.v fifo_fill.v inc_adr.v ref_counter.v ref_delay_counter.v pre_delay_counter.v burst_length_counter.v ddr_16.v fsm_wb.v delay.v ddr_ff.v dcm_pll.v dff_sr.v versatile_mem_ctrl_ddr.v ddr_16_defines.v sdr_16_defines.v codec.v gray_counter.v egress_fifo.v versatile_fifo_dual_port_ram_dc_sw.v fsm_sdr_16.v versatile_mem_ctrl_wb.v versatile_mem_ctrl_top.v
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versatile_mem_ctrl_ip.v: $(VERSATILE_MEM_CTRL_IP_FILES)
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cat $^ | cat copyright.v - > $@
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# SDRAM 16-bit wide databus dependency files - force a recompile
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# SDRAM 16-bit wide databus dependency files - force a recompile
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SDR_16_FILES=sdr_16_defines.v fsm_wb.v versatile_fifo_async_cmp.v async_fifo_mq.v delay.v codec.v gray_counter.v egress_fifo.v versatile_fifo_dual_port_ram_dc_sw.v dff_sr.v ref_counter.v fsm_sdr_16.v versatile_mem_ctrl_wb.v versatile_mem_ctrl_top.v
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SDR_16_FILES=sdr_16_defines.v fsm_wb.v versatile_fifo_async_cmp.v async_fifo_mq.v delay.v codec.v gray_counter.v egress_fifo.v versatile_fifo_dual_port_ram_dc_sw.v dff_sr.v ref_counter.v fsm_sdr_16.v versatile_mem_ctrl_wb.v versatile_mem_ctrl_top.v
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sdr_16.v: $(SDR_16_FILES)
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sdr_16.v: $(SDR_16_FILES)
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vppreproc +define+SDR_16 +incdir+. $^ > $@
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vppreproc +define+SDR_16 +incdir+. $^ > $@
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# the single all rule
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# the single all rule
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all: versatile_fifo_dual_port_ram.v versatile_fifo_async_cmp.v versatile_fifo_dual_port_ram_dc_dw.v counter_csvs fifo_fill.v sdr_16.v ddr_16.v versatile_mem_ctrl_ip.v
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#all: versatile_fifo_dual_port_ram.v versatile_fifo_async_cmp.v versatile_fifo_dual_port_ram_dc_dw.v counter_csvs fifo_fill.v sdr_16.v ddr_16.v versatile_mem_ctrl_ip.v
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all: sdr_16.v
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clean:
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clean:
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rm -rf $(VERSATILE_FIFO_PROJECT_FILES) $(VERSATILE_COUNTER_PROJECT_FILES)
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rm -rf $(VERSATILE_FIFO_PROJECT_FILES) $(VERSATILE_COUNTER_PROJECT_FILES)
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rm -rf fifo_fill.v sdr_16.v ddr_16.v
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rm -rf fifo_fill.v sdr_16.v ddr_16.v
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rm -f versatile_fifo_dual_port_ram_dc_dw.v ddr_16_generated.v
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# rm -f versatile_fifo_dual_port_ram_dc_dw.v ddr_16_generated.v
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rm -rf *_counter.v
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rm -rf *_counter.v
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rm -rf *.csv
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rm -rf *.csv
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rm -rf *~
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rm -rf *~
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