Subversion Repositories openrisc

BOARD_BACKEND_VERILOG_DIR=$(BOARD_BACKEND_DIR)/rtl/verilog

BOARD_BACKEND_VERILOG_DIR=$(BOARD_BACKEND_DIR)/rtl/verilog

TECHNOLOGY_BACKEND_DIR=$(BOARD_DIR)/../backend

TECHNOLOGY_BACKEND_DIR=$(BOARD_DIR)/../backend

# This path is for the technology library

# This path is for the technology library

TECHNOLOGY_BACKEND_VERILOG_DIR=$(TECHNOLOGY_BACKEND_DIR)/rtl/verilog

TECHNOLOGY_BACKEND_VERILOG_DIR=$(TECHNOLOGY_BACKEND_DIR)/rtl/verilog

# System software dir

# System software dir

COMMON_SW_DIR=$(PROJECT_ROOT)/sw

COMMON_SW_DIR=$(PROJECT_ROOT)/sw

BOARD_SW_DIR=$(BOARD_DIR)/sw

BOARD_SW_DIR=$(BOARD_DIR)/sw

# BootROM code, which generates a verilog array select values

# BootROM code, which generates a verilog array select values

        $(MAKE) -C $(VPI_SRC_C_DIR) $(MODELTECH_VPILIB)

        $(MAKE) -C $(VPI_SRC_C_DIR) $(MODELTECH_VPILIB)

#

#

# Verilog DUT source variables

# Verilog DUT source variables

#

#

# First we get a list of modules in the RTL path of the board's path.

# First we get a list of modules in the RTL path of the board's path.

# Next we check which modules not in the board's RTL path are in the root RTL

# Next we check which modules not in the board's RTL path are in the root RTL

# path (modules which can be commonly instantiated, but over which board

# path (modules which can be commonly instantiated, but over which board

# build-specific versions take precedence.)

# build-specific versions take precedence.)

# Paths under board/***/rtl/verilog we wish to exclude when getting modules

# Paths under board/***/rtl/verilog we wish to exclude when getting modules

BOARD_VERILOG_MODULES_DIR_LIST=$(shell ls $(BOARD_RTL_VERILOG_DIR))

BOARD_VERILOG_MODULES_DIR_LIST=$(shell ls $(BOARD_RTL_VERILOG_DIR))

# Apply exclude to list of modules

# Apply exclude to list of modules

BOARD_RTL_VERILOG_MODULES=$(filter-out $(BOARD_VERILOG_MODULES_EXCLUDE),$(BOARD_VERILOG_MODULES_DIR_LIST))

BOARD_RTL_VERILOG_MODULES=$(filter-out $(BOARD_VERILOG_MODULES_EXCLUDE),$(BOARD_VERILOG_MODULES_DIR_LIST))

# Rule for debugging this script

# Rule for debugging this script

        @echo $(BOARD_RTL_VERILOG_MODULES)

        @echo $(BOARD_RTL_VERILOG_MODULES)

# Now get list of modules that we don't have a version of in the board path

# Now get list of modules that we don't have a version of in the board path

COMMON_VERILOG_MODULES_EXCLUDE= include

COMMON_VERILOG_MODULES_EXCLUDE= include

COMMON_VERILOG_MODULES_EXCLUDE += $(BOARD_RTL_VERILOG_MODULES)

COMMON_VERILOG_MODULES_EXCLUDE += $(BOARD_RTL_VERILOG_MODULES)

COMMON_RTL_VERILOG_MODULES_DIR_LIST=$(shell ls $(COMMON_RTL_VERILOG_DIR))

COMMON_RTL_VERILOG_MODULES_DIR_LIST=$(shell ls $(COMMON_RTL_VERILOG_DIR))

COMMON_RTL_VERILOG_MODULES=$(filter-out $(COMMON_VERILOG_MODULES_EXCLUDE), $(COMMON_RTL_VERILOG_MODULES_DIR_LIST))

COMMON_RTL_VERILOG_MODULES=$(filter-out $(COMMON_VERILOG_MODULES_EXCLUDE), $(COMMON_RTL_VERILOG_MODULES_DIR_LIST))

# Rule for debugging this script

# Rule for debugging this script

print-common-modules-exclude:

print-common-modules-exclude:

        @echo echo; echo "\t### Common verilog modules being excluded due to board versions ###"; echo

        @echo echo; echo "\t### Common verilog modules being excluded due to board versions ###"; echo

        @echo "$(COMMON_VERILOG_MODULES_EXCLUDE)"

        @echo "$(COMMON_VERILOG_MODULES_EXCLUDE)"

        $(Q)echo "+incdir+"$(BOARD_BENCH_VERILOG_INCLUDE_DIR) >> $@;

        $(Q)echo "+incdir+"$(BOARD_BENCH_VERILOG_INCLUDE_DIR) >> $@;

        $(Q)echo "+libext+.v" >> $@;

        $(Q)echo "+libext+.v" >> $@;

        $(Q)for module in $(BOARD_RTL_VERILOG_MODULES); do if [ -d $(BOARD_RTL_VERILOG_DIR)/$$module ]; then echo "-y " $(BOARD_RTL_VERILOG_DIR)/$$module >> $@; fi; done

        $(Q)for module in $(BOARD_RTL_VERILOG_MODULES); do if [ -d $(BOARD_RTL_VERILOG_DIR)/$$module ]; then echo "-y " $(BOARD_RTL_VERILOG_DIR)/$$module >> $@; fi; done

        $(Q)for module in $(COMMON_RTL_VERILOG_MODULES); do if [ -d $(COMMON_RTL_VERILOG_DIR)/$$module ]; then echo "-y " $(COMMON_RTL_VERILOG_DIR)/$$module >> $@; fi; done

        $(Q)for module in $(COMMON_RTL_VERILOG_MODULES); do if [ -d $(COMMON_RTL_VERILOG_DIR)/$$module ]; then echo "-y " $(COMMON_RTL_VERILOG_DIR)/$$module >> $@; fi; done

        $(Q)echo "-y " $(BOARD_BACKEND_VERILOG_DIR) >> $@;

        $(Q)echo "-y " $(BOARD_BACKEND_VERILOG_DIR) >> $@;

        $(Q)echo >> $@

        $(Q)echo >> $@

modelsim_bench.scr: $(BOARD_BENCH_VERILOG_SRC) $(COMMON_BENCH_VERILOG_SRC)

modelsim_bench.scr: $(BOARD_BENCH_VERILOG_SRC) $(COMMON_BENCH_VERILOG_SRC)

        $(Q)echo "+incdir+"$(BOARD_BENCH_VERILOG_INCLUDE_DIR) > $@;

        $(Q)echo "+incdir+"$(BOARD_BENCH_VERILOG_INCLUDE_DIR) > $@;

        $(Q)echo "+incdir+"$(COMMON_BENCH_VERILOG_INCLUDE_DIR) >> $@;

        $(Q)echo "+incdir+"$(COMMON_BENCH_VERILOG_INCLUDE_DIR) >> $@;

        $(Q)./$@

        $(Q)./$@

# Include the test-defines.v generation rule

# Include the test-defines.v generation rule

include $(PROJECT_ROOT)/sim/bin/definesgen.inc

include $(PROJECT_ROOT)/sim/bin/definesgen.inc

#

#

# Software make rules (called recursively)

# Software make rules (called recursively)

#

#

# Path for the current test

# Path for the current test

endif

endif

.PHONY : sw

.PHONY : sw

sw: $(SIM_SW_IMAGE)

sw: $(SIM_SW_IMAGE)

flash.in: $(SW_TEST_DIR)/$(TEST).flashin

flash.in: $(SW_TEST_DIR)/$(TEST).flashin

        $(Q)if [ -L $@ ]; then unlink $@; fi

        $(Q)if [ -L $@ ]; then unlink $@; fi

        $(Q)ln -s $< $@

        $(Q)ln -s $< $@

sram.vmem: $(SW_TEST_DIR)/$(TEST).vmem

sram.vmem: $(SW_TEST_DIR)/$(TEST).vmem

.PHONY: $(SW_TEST_DIR)/$(TEST).vmem

.PHONY: $(SW_TEST_DIR)/$(TEST).vmem

$(SW_TEST_DIR)/$(TEST).vmem:

$(SW_TEST_DIR)/$(TEST).vmem:

        $(Q) echo; echo "\t### Compiling software ###"; echo;

        $(Q) echo; echo "\t### Compiling software ###"; echo;

        $(Q)$(MAKE) -C $(SW_TEST_DIR) $(TEST).vmem

        $(Q)$(MAKE) -C $(SW_TEST_DIR) $(TEST).vmem

#

#

# Cleaning rules

# Cleaning rules

#

#

clean: clean-sim clean-sim-test-sw clean-bootrom clean-out clean-sw

clean: clean-sim clean-sim-test-sw clean-bootrom clean-out clean-sw