URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [sw/] [board/] [include/] [board.h] - Diff between revs 485 and 486

Rev 485	Rev 486
Line 103...	Line 103...
`UART0_BASE, UART2_BASE, UART2_BASE`	`UART0_BASE, UART2_BASE, UART2_BASE`

`#define UART_BAUD_RATES_CSV \`	`#define UART_BAUD_RATES_CSV \`
`UART0_BAUD_RATE, UART1_BAUD_RATE, UART1_BAUD_RATE`	`UART0_BAUD_RATE, UART1_BAUD_RATE, UART1_BAUD_RATE`

	`//`
	`// i2c_master_slave core driver configuration`
	`//`

	`#define I2C_MASTER_SLAVE_NUM_CORES 4`

	`#define I2C_MASTER_SLAVE_BASE_ADDRESSES_CSV \`
	`I2C_0_BASE, I2C_1_BASE, I2C_2_BASE,I2C_3_BASE`



`#endif`	`#endif`

`No newline at end of file`	`No newline at end of file`