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include $(PROJECT_ROOT)/scripts/make/Makefile-misc.inc
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include $(PROJECT_ROOT)/scripts/make/Makefile-misc.inc
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include $(PROJECT_ROOT)/scripts/make/Makefile-board-paths.inc
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include $(PROJECT_ROOT)/scripts/make/Makefile-board-paths.inc
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include $(PROJECT_ROOT)/scripts/make/Makefile-board-tops.inc
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include $(PROJECT_ROOT)/scripts/make/Makefile-board-tops.inc
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include $(PROJECT_ROOT)/scripts/make/Makefile-board-definesparse.inc
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include $(PROJECT_ROOT)/scripts/make/Makefile-board-definesparse.inc
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# Check that the XILINX_PATH variable is set
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# Check that the Xilinx scripts have been sourced
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ifeq ($(XILINX_PATH),)
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ifndef XILINX
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$(error XILINX_PATH environment variable not set. Set it and rerun)
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$(error The XILINX environment variable was not set, \
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endif
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please run: 'source /path/to/xilinx_ise/settings{32|64}.sh')
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XILINX_SETTINGS_SCRIPT=$(XILINX_PATH)/settings32.sh
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XILINX_SETTINGS_SCRIPT_EXISTS=$(shell if [ -e $(XILINX_SETTINGS_SCRIPT) ]; then echo 1; else echo 0; fi)
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ifeq ($(XILINX_SETTINGS_SCRIPT_EXISTS),0)
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$(error XILINX_PATH variable not set correctly. Cannot find $$XILINX_PATH/settings32.sh)
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endif
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endif
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# Backend directories
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# Backend directories
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# This one is the board build's backend dir.
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# This one is the board build's backend dir.
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BOARD_BACKEND_DIR=$(BOARD_ROOT)/backend
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BOARD_BACKEND_DIR=$(BOARD_ROOT)/backend
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BOARD_BACKEND_VERILOG_DIR=$(BOARD_BACKEND_DIR)/rtl/verilog
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BOARD_BACKEND_VERILOG_DIR=$(BOARD_BACKEND_DIR)/rtl/verilog
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BOARD_BACKEND_BIN_DIR=$(BOARD_BACKEND_DIR)/bin
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BOARD_BACKEND_BIN_DIR=$(BOARD_BACKEND_DIR)/bin
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# Technology backend (vendor-specific)
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# Technology backend (vendor-specific)
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TECHNOLOGY_BACKEND_DIR=$(BOARD_ROOT)/../backend
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TECHNOLOGY_BACKEND_DIR=$(BOARD_ROOT)/../backend
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# This path is for the technology library
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# This path is for the technology library
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TECHNOLOGY_LIBRARY_VERILOG_DIR=$(XILINX_PATH)/ISE/verilog
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TECHNOLOGY_LIBRARY_VERILOG_DIR=$(XILINX)/verilog
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# This path is for the technology binaries
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# This path is for the technology binaries
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TECHNOLOGY_BACKEND_BIN_DIR=$(XILINX_PATH)/ISE/bin/lin
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TECHNOLOGY_BACKEND_BIN_DIR=$(XILINX)/bin/lin
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# Board specific modelsim options
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# Board specific modelsim options
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VSIM_ARGS= -L secureip
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VSIM_ARGS= -L secureip
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VOPT_ARGS= -L secureip
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VOPT_ARGS= -L secureip
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