| Line 46... |
Line 46... |
FPGA_PART=xc5vlx50-ff676-1
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FPGA_PART=xc5vlx50-ff676-1
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XILINX_FLAGS=-intstyle silent
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XILINX_FLAGS=-intstyle silent
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XILINX_MAP_FLAGS=-logic_opt off
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XILINX_MAP_FLAGS=-logic_opt off
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XILINX_AREA_TARGET = speed
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XILINX_AREA_TARGET = speed
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TIMING_REPORT_OPTIONS = -u 1000 -e 1000
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TIMING_REPORT_OPTIONS = -u 1000 -e 1000
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#
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# Board programming generation settings
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#
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SPI_FLASH_SIZE_KBYTES ?=2048
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SPI_FLASH_SIZE_KBYTES ?=2048
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SPI_BOOTLOADER_SW_OFFSET_HEX ?=1c0000
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SPI_BOOTLOADER_SW_OFFSET_HEX ?=1c0000
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PLATFORMFLASH_PART ?= xcf32p
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print-config:
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print-config:
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$(Q)echo; echo "\t### Backend make configuration ###"; echo
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$(Q)echo; echo "\t### Backend make configuration ###"; echo
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$(Q)echo "\tFPGA_PART="$(FPGA_PART)
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$(Q)echo "\tFPGA_PART="$(FPGA_PART)
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$(Q)echo "\tXILINX_FLAGS="$(XILINX_FLAGS)
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$(Q)echo "\tXILINX_FLAGS="$(XILINX_FLAGS)
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| Line 67... |
Line 71... |
MAPPED_NCD=$(DESIGN_NAME)_mapped.ncd
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MAPPED_NCD=$(DESIGN_NAME)_mapped.ncd
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PARRED_NCD=$(DESIGN_NAME).ncd
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PARRED_NCD=$(DESIGN_NAME).ncd
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PCF_FILE=$(DESIGN_NAME).pcf
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PCF_FILE=$(DESIGN_NAME).pcf
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BIT_FILE=$(DESIGN_NAME).bit
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BIT_FILE=$(DESIGN_NAME).bit
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BIT_FILE_FOR_SPI=$(DESIGN_NAME)_spiboot.bit
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BIT_FILE_FOR_SPI=$(DESIGN_NAME)_spiboot.bit
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BIT_FILE_FOR_PLATFORMFLASH=$(DESIGN_NAME)_platformflash.bit
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BATCH_FILE=$(DESIGN_NAME).batch
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BATCH_FILE=$(DESIGN_NAME).batch
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MCS_FILE=$(DESIGN_NAME).mcs
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SPI_MCS_FILE=$(DESIGN_NAME)_spi.mcs
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PLATFORMFLASH_MCS_FILE=$(DESIGN_NAME)_platformflash.mcs
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$(NGC_FILE):
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$(NGC_FILE):
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$(Q)$(MAKE) -C $(BOARD_SYN_RUN_DIR) $(DESIGN_NAME).ngc
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$(Q)$(MAKE) -C $(BOARD_SYN_RUN_DIR) $(DESIGN_NAME).ngc
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|
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$(NGD_FILE): $(UCF_FILE) $(NGC_FILE)
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$(NGD_FILE): $(UCF_FILE) $(NGC_FILE)
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| Line 100... |
Line 107... |
|
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$(BIT_FILE_FOR_SPI): $(PARRED_NCD)
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$(BIT_FILE_FOR_SPI): $(PARRED_NCD)
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@echo; echo "\t#### Generating .bit file for SPI load ####";
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@echo; echo "\t#### Generating .bit file for SPI load ####";
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$(Q)bitgen -w $(XILINX_FLAGS) -g StartUpClk:CClk $< $@
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$(Q)bitgen -w $(XILINX_FLAGS) -g StartUpClk:CClk $< $@
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|
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$(BIT_FILE_FOR_PLATFORMFLASH): $(PARRED_NCD)
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@echo; echo "\t#### Generating .bit file for platform flash load ####";
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$(Q)bitgen -w $(XILINX_FLAGS) -g StartUpClk:CClk $< $@
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|
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# Generate MCS with bootloader specified by user, if BOOTLOADER_BIN defined.
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# Generate MCS with bootloader specified by user, if BOOTLOADER_BIN defined.
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ifeq ($(BOOTLOADER_BIN),)
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ifeq ($(BOOTLOADER_BIN),)
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$(MCS_FILE): $(BIT_FILE_FOR_SPI)
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$(SPI_MCS_FILE): $(BIT_FILE_FOR_SPI)
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@echo; echo "\t#### Generating .mcs file for SPI load ####";
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@echo; echo "\t#### Generating .mcs file for SPI load ####";
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$(Q)promgen -spi -p mcs -w -o $@ -s $(SPI_FLASH_SIZE_KBYTES) -u 0 $<
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$(Q)promgen -spi -p mcs -w -o $@ -s $(SPI_FLASH_SIZE_KBYTES) -u 0 $<
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else
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else
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$(MCS_FILE): $(BIT_FILE_FOR_SPI)
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$(SPI_MCS_FILE): $(BIT_FILE_FOR_SPI)
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@echo; echo "\t#### Generating .mcs file with bootloader for SPI load ####";
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@echo; echo "\t#### Generating .mcs file with bootloader for SPI load ####";
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$(Q)promgen -spi -p mcs -w -o $@ -s $(SPI_FLASH_SIZE_KBYTES) -u 0 $< \
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$(Q)promgen -spi -p mcs -w -o $@ -s $(SPI_FLASH_SIZE_KBYTES) -u 0 $< \
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-data_file up $(SPI_BOOTLOADER_SW_OFFSET_HEX) $(BOOTLOADER_BIN)
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-data_file up $(SPI_BOOTLOADER_SW_OFFSET_HEX) $(BOOTLOADER_BIN)
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endif
|
endif
|
|
|
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$(PLATFORMFLASH_MCS_FILE): $(BIT_FILE_FOR_PLATFORMFLASH)
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@echo; echo "\t#### Generating .mcs file for platform flash load ####";
|
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$(Q)promgen -p mcs -w -o $@ -x $(PLATFORMFLASH_PART) -data_width 16 \
|
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-u 0 $<
|
|
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#this target downloads the bitstream to the target fpga
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#this target downloads the bitstream to the target fpga
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download: $(BIT_FILE) $(BATCH_FILE)
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download: $(BIT_FILE) $(BATCH_FILE)
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$(Q)impact -batch $(BATCH_FILE)
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$(Q)impact -batch $(BATCH_FILE)
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|
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#This target uses netgen to make a simulation netlist
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#This target uses netgen to make a simulation netlist
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