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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
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/****************************************************************************************
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/****************************************************************************************
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*
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*
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* File Name: ddr2.v
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* File Name: ddr2_model.v
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* Version: 5.80
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* Version: 5.80
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* Model: BUS Functional
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* Model: BUS Functional
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*
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*
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* Dependencies: ddr2_parameters.vh
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* Dependencies: ddr2_parameters.v
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*
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*
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* Description: Micron SDRAM DDR2 (Double Data Rate 2)
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* Description: Micron SDRAM DDR2 (Double Data Rate 2)
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*
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*
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* Limitation: - doesn't check for average refresh timings
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* Limitation: - doesn't check for average refresh timings
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* - positive ck and ck_n edges are used to form internal clock
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* - positive ck and ck_n edges are used to form internal clock
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dqs_n,
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dqs_n,
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rdqs_n,
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rdqs_n,
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odt
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odt
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);
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);
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`include "ddr2_model_parameters.vh"
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`include "ddr2_model_parameters.v"
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// text macros
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// text macros
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`define DQ_PER_DQS DQ_BITS/DQS_BITS
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`define DQ_PER_DQS DQ_BITS/DQS_BITS
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`define BANKS (1<<BA_BITS)
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`define BANKS (1<<BA_BITS)
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`define MAX_BITS (BA_BITS+ROW_BITS+COL_BITS-BL_BITS)
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`define MAX_BITS (BA_BITS+ROW_BITS+COL_BITS-BL_BITS)
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