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Line 44... |
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`define ETH_MBIST_CTRL_WIDTH 3 // width of MBIST control bus
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`define ETH_MBIST_CTRL_WIDTH 3 // width of MBIST control bus
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// Generic FIFO implementation - hopefully synthesizable with Synplify
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// Generic FIFO implementation - hopefully synthesizable with Synplify
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//`define ETH_FIFO_GENERIC
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//`define ETH_FIFO_GENERIC
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// Ethernet implemented in Xilinx Chips (uncomment following lines)
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`define ETH_FIFO_XILINX // Use Xilinx distributed ram for tx and rx fifo
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// `define ETH_XILINX_RAMB4 // Selection of the used memory for Buffer descriptors
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// Core is going to be implemented in Virtex FPGA and contains Virtex
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// specific elements.
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// specific elements.
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`define ETH_FIFO_XILINX
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//`define ETH_FIFO_RAMB18
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// Ethernet implemented in Altera Chips (uncomment following lines)
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//`define ETH_ALTERA_ALTSYNCRAM
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// Ethernet implemented in ASIC with Virtual Silicon RAMs
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// `define ETH_VIRTUAL_SILICON_RAM // Virtual Silicon RAMS used storing buffer decriptors (ASIC implementation)
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// Ethernet implemented in ASIC with Artisan RAMs
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// `define ETH_ARTISAN_RAM // Artisan RAMS used storing buffer decriptors (ASIC implementation)
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// Uncomment when Avalon bus is used
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//`define ETH_AVALON_BUS
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`define ETH_MODER_ADR 8'h0 // 0x0
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`define ETH_MODER_ADR 8'h0 // 0x0
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`define ETH_INT_SOURCE_ADR 8'h1 // 0x4
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`define ETH_INT_SOURCE_ADR 8'h1 // 0x4
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`define ETH_INT_MASK_ADR 8'h2 // 0x8
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`define ETH_INT_MASK_ADR 8'h2 // 0x8
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`define ETH_IPGT_ADR 8'h3 // 0xC
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`define ETH_IPGT_ADR 8'h3 // 0xC
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// Settings for TX FIFO
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// Settings for TX FIFO
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`define ETH_TX_FIFO_DATA_WIDTH 32
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`define ETH_TX_FIFO_DATA_WIDTH 32
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// Defines for ethernet TX fifo size - impacts FPGA resource usage
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// Defines for ethernet TX fifo size - impacts FPGA resource usage
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//`define ETH_TX_FULL_PACKET_FIFO // Full 1500 byte TX buffer - uncomment this
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//`define ETH_TX_64BYTE_FIFO // 64 byte TX buffer - uncomment this
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//`define ETH_TX_128BYTE_FIFO // 128 byte TX buffer - uncomment this
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//`define ETH_TX_128BYTE_FIFO // 128 byte TX buffer - uncomment this
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`define ETH_TX_256BYTE_FIFO // 256 byte TX buffer - uncomment this
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`define ETH_TX_256BYTE_FIFO // 256 byte TX buffer - uncomment this
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//`define ETH_TX_512BYTE_FIFO // 512 byte TX buffer - uncomment this
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//`define ETH_TX_512BYTE_FIFO // 512 byte TX buffer - uncomment this
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//`define ETH_TX_1KBYTE_FIFO // 1024 byte TX buffer - uncomment this
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//`define ETH_TX_1KBYTE_FIFO // 1024 byte TX buffer - uncomment this
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//`define ETH_TX_FULL_PACKET_FIFO // Full 1500 byte TX buffer - uncomment this
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`ifdef ETH_TX_FULL_PACKET_FIFO
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`ifdef ETH_TX_FULL_PACKET_FIFO
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`define ETH_TX_FIFO_CNT_WIDTH 9
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`define ETH_TX_FIFO_CNT_WIDTH 9
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`define ETH_TX_FIFO_DEPTH 375
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`define ETH_TX_FIFO_DEPTH 375
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`else
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`endif
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`ifdef ETH_TX_1KBYTE_FIFO
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`ifdef ETH_TX_1KBYTE_FIFO
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`define ETH_TX_FIFO_CNT_WIDTH 8
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`define ETH_TX_FIFO_CNT_WIDTH 8
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`define ETH_TX_FIFO_DEPTH 256
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`define ETH_TX_FIFO_DEPTH 256
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`else
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`endif
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`ifdef ETH_TX_512BYTE_FIFO
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`ifdef ETH_TX_512BYTE_FIFO
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`define ETH_TX_FIFO_CNT_WIDTH 7
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`define ETH_TX_FIFO_CNT_WIDTH 7
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`define ETH_TX_FIFO_DEPTH 128
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`define ETH_TX_FIFO_DEPTH 128
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`else
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`endif
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`ifdef ETH_TX_256BYTE_FIFO
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`ifdef ETH_TX_256BYTE_FIFO
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`define ETH_TX_FIFO_CNT_WIDTH 6
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`define ETH_TX_FIFO_CNT_WIDTH 6
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`define ETH_TX_FIFO_DEPTH 64
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`define ETH_TX_FIFO_DEPTH 64
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`else
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`endif
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`ifdef ETH_TX_128BYTE_FIFO
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`ifdef ETH_TX_128BYTE_FIFO
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`define ETH_TX_FIFO_CNT_WIDTH 5
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`define ETH_TX_FIFO_CNT_WIDTH 5
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`define ETH_TX_FIFO_DEPTH 32
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`define ETH_TX_FIFO_DEPTH 32
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`else
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`endif
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// Default is 64 bytes
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`ifdef ETH_TX_128BYTE_FIFO
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`define ETH_TX_FIFO_CNT_WIDTH 4
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`define ETH_TX_FIFO_CNT_WIDTH 4
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`define ETH_TX_FIFO_DEPTH 16
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`define ETH_TX_FIFO_DEPTH 16
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`endif
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`endif
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`endif
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`endif
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`endif // !`ifdef ETH_TX_512BYTE_FIFO
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`endif // !`ifdef ETH_TX_FULL_PACKET_FIFO
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// Settings for RX FIFO
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// Settings for RX FIFO
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//`define ETH_RX_FIFO_CNT_WIDTH 8
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//`define ETH_RX_FIFO_CNT_WIDTH 8
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//`define ETH_RX_FIFO_DEPTH 256
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//`define ETH_RX_FIFO_DEPTH 256
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//`define ETH_RX_FIFO_CNT_WIDTH 7
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//`define ETH_RX_FIFO_CNT_WIDTH 7
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//`define ETH_RX_FIFO_DEPTH 128
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`define ETH_RX_FIFO_DEPTH 128
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`define ETH_RX_FIFO_CNT_WIDTH 6
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`define ETH_RX_FIFO_CNT_WIDTH 6
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`define ETH_RX_FIFO_DEPTH 64
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//`define ETH_RX_FIFO_DEPTH 64
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//`define ETH_RX_FIFO_CNT_WIDTH 5
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//`define ETH_RX_FIFO_CNT_WIDTH 5
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//`define ETH_RX_FIFO_DEPTH 32
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//`define ETH_RX_FIFO_DEPTH 32
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//`define ETH_RX_FIFO_CNT_WIDTH 4
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//`define ETH_RX_FIFO_CNT_WIDTH 4
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//`define ETH_RX_FIFO_DEPTH 16
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//`define ETH_RX_FIFO_DEPTH 16
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