Line 142... |
Line 142... |
COMMON_SW_DIR=$(PROJECT_ROOT)/sw
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COMMON_SW_DIR=$(PROJECT_ROOT)/sw
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BOARD_SW_DIR=$(BOARD_DIR)/sw
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BOARD_SW_DIR=$(BOARD_DIR)/sw
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|
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# BootROM code, which generates a verilog array select values
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# BootROM code, which generates a verilog array select values
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BOOTROM_FILE=bootrom.v
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BOOTROM_FILE=bootrom.v
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BOOTROM_SW_DIR=$(BOARD_SW_DIR)/bootrom
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BOARD_BOOTROM_SW_DIR=$(BOARD_SW_DIR)/bootrom
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BOOTROM_SRC=$(shell ls $(BOOTROM_SW_DIR)/* | grep -v $(BOOTROM_FILE))
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BOOTROM_SRC=$(shell ls $(BOARD_BOOTROM_SW_DIR)/* | grep -v $(BOOTROM_FILE))
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BOOTROM_VERILOG=$(BOOTROM_SW_DIR)/$(BOOTROM_FILE)
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BOOTROM_VERILOG=$(BOARD_BOOTROM_SW_DIR)/$(BOOTROM_FILE)
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|
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bootrom: $(BOOTROM_VERILOG)
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bootrom: $(BOOTROM_VERILOG)
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|
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$(BOOTROM_VERILOG): $(BOOTROM_SRC)
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$(BOOTROM_VERILOG): $(BOOTROM_SRC)
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$(Q)echo; echo "\t### Generating bootup ROM ###"; echo
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$(Q)echo; echo "\t### Generating bootup ROM ###"; echo
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$(Q)$(MAKE) -C $(BOOTROM_SW_DIR) $(BOOTROM_FILE)
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$(Q)$(MAKE) -C $(BOARD_BOOTROM_SW_DIR) $(BOOTROM_FILE)
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# Suffix of file to check after each test for the string
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# Suffix of file to check after each test for the string
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TEST_OUT_FILE_SUFFIX=-general.log
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TEST_OUT_FILE_SUFFIX=-general.log
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TEST_OK_STRING=8000000d
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TEST_OK_STRING=8000000d
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# Dynamically generated verilog file defining configuration for various things
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# Dynamically generated verilog file defining configuration for various things
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# Rule actually generating this is found in definesgen.inc file.
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# Rule actually generating this is found in definesgen.inc file.
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TEST_DEFINES_VLG=test-defines.v
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TEST_DEFINES_VLG=test-defines.v
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.PHONY: $(TEST_DEFINES_VLG)
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# Set V=1 when calling make to enable verbose output
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# Set V=1 when calling make to enable verbose output
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# mainly for debugging purposes.
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# mainly for debugging purposes.
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ifeq ($(V), 1)
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ifeq ($(V), 1)
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Q=
|
Q=
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QUIET=
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QUIET=
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Line 353... |
Line 354... |
# Modelsim library compilation rules
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# Modelsim library compilation rules
|
# $(Q)echo "-y " $(BOARD_BACKEND_VERILOG_DIR) >> $@;
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# $(Q)echo "-y " $(BOARD_BACKEND_VERILOG_DIR) >> $@;
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# DUT compile script
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# DUT compile script
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modelsim_dut.scr: rtl $(RTL_VERILOG_SRC) $(RTL_VERILOG_INCLUDES) $(BOOTROM_VERILOG)
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modelsim_dut.scr: rtl $(RTL_VERILOG_SRC) $(RTL_VERILOG_INCLUDES) $(BOOTROM_VERILOG)
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$(Q)echo "+incdir+"$(BOARD_RTL_VERILOG_INCLUDE_DIR) > $@;
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$(Q)echo "+incdir+"$(BOARD_RTL_VERILOG_INCLUDE_DIR) > $@;
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$(Q)echo "+incdir+"$(BOOTROM_SW_DIR) >> $@;
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$(Q)echo "+incdir+"$(BOARD_BOOTROM_SW_DIR) >> $@;
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$(Q)echo "+incdir+"$(BOARD_BENCH_VERILOG_INCLUDE_DIR) >> $@;
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$(Q)echo "+incdir+"$(BOARD_BENCH_VERILOG_INCLUDE_DIR) >> $@;
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$(Q)echo "+libext+.v" >> $@;
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$(Q)echo "+libext+.v" >> $@;
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$(Q)for module in $(BOARD_RTL_VERILOG_MODULES); do if [ -d $(BOARD_RTL_VERILOG_DIR)/$$module ]; then echo "-y " $(BOARD_RTL_VERILOG_DIR)/$$module >> $@; fi; done
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$(Q)for module in $(BOARD_RTL_VERILOG_MODULES); do if [ -d $(BOARD_RTL_VERILOG_DIR)/$$module ]; then echo "-y " $(BOARD_RTL_VERILOG_DIR)/$$module >> $@; fi; done
|
$(Q)for module in $(COMMON_RTL_VERILOG_MODULES); do if [ -d $(COMMON_RTL_VERILOG_DIR)/$$module ]; then echo "-y " $(COMMON_RTL_VERILOG_DIR)/$$module >> $@; fi; done
|
$(Q)for module in $(COMMON_RTL_VERILOG_MODULES); do if [ -d $(COMMON_RTL_VERILOG_DIR)/$$module ]; then echo "-y " $(COMMON_RTL_VERILOG_DIR)/$$module >> $@; fi; done
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$(Q)echo "-y "$(TECHNOLOGY_BACKEND_VERILOG_DIR)"/src/unisims" >> $@;
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$(Q)echo "-y "$(TECHNOLOGY_BACKEND_VERILOG_DIR)"/src/unisims" >> $@;
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Line 471... |
Line 472... |
SIM_SW_IMAGE ?=sram.vmem
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SIM_SW_IMAGE ?=sram.vmem
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else
|
else
|
SIM_SW_IMAGE ?=flash.in
|
SIM_SW_IMAGE ?=flash.in
|
endif
|
endif
|
|
|
|
# Amount to pad the image we'll load into the SPI flash
|
|
HEX_IMAGE_PADDING ?=0x1c0000
|
|
|
.PHONY : sw
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.PHONY : sw
|
sw: $(SIM_SW_IMAGE)
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sw: $(SIM_SW_IMAGE)
|
|
|
|
|
flash.in: $(SW_TEST_DIR)/$(TEST).flashin
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flash.in: $(SW_TEST_DIR)/$(TEST).flashin
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Line 486... |
Line 490... |
$(Q)ln -s $< $@
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$(Q)ln -s $< $@
|
|
|
.PHONY: $(SW_TEST_DIR)/$(TEST).flashin
|
.PHONY: $(SW_TEST_DIR)/$(TEST).flashin
|
$(SW_TEST_DIR)/$(TEST).flashin:
|
$(SW_TEST_DIR)/$(TEST).flashin:
|
$(Q) echo; echo "\t### Compiling software ###"; echo;
|
$(Q) echo; echo "\t### Compiling software ###"; echo;
|
$(Q)$(MAKE) -C $(SW_TEST_DIR) $(TEST).flashin
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$(Q)$(MAKE) -C $(SW_TEST_DIR) $(TEST).flashin \
|
|
HEX_IMAGE_PADDING=$(HEX_IMAGE_PADDING)
|
|
|
.PHONY: $(SW_TEST_DIR)/$(TEST).vmem
|
.PHONY: $(SW_TEST_DIR)/$(TEST).vmem
|
$(SW_TEST_DIR)/$(TEST).vmem:
|
$(SW_TEST_DIR)/$(TEST).vmem:
|
$(Q) echo; echo "\t### Compiling software ###"; echo;
|
$(Q) echo; echo "\t### Compiling software ###"; echo;
|
$(Q)$(MAKE) -C $(SW_TEST_DIR) $(TEST).vmem
|
$(Q)$(MAKE) -C $(SW_TEST_DIR) $(TEST).vmem
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Line 512... |
Line 517... |
$(Q) echo; echo "\t### Cleaning simulation run directory ###"; echo;
|
$(Q) echo; echo "\t### Cleaning simulation run directory ###"; echo;
|
$(Q)rm -rf *.* lib_* work transcript check-test-log
|
$(Q)rm -rf *.* lib_* work transcript check-test-log
|
# No VPI support for now. $(Q) if [ -e $(VPI_SRC_C_DIR) ]; then $(MAKE) -C $(VPI_SRC_C_DIR) clean; fi
|
# No VPI support for now. $(Q) if [ -e $(VPI_SRC_C_DIR) ]; then $(MAKE) -C $(VPI_SRC_C_DIR) clean; fi
|
|
|
clean-bootrom:
|
clean-bootrom:
|
$(MAKE) -C $(BOOTROM_SW_DIR) clean
|
$(MAKE) -C $(BOARD_BOOTROM_SW_DIR) clean
|
|
|
clean-out:
|
clean-out:
|
$(Q)rm -rf $(RTL_SIM_RESULTS_DIR)/*.*
|
$(Q)rm -rf $(RTL_SIM_RESULTS_DIR)/*.*
|
|
|
clean-test-defines:
|
clean-test-defines:
|