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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [sim/] [bin/] [Makefile] - Diff between revs 449 and 468

Rev 449	Rev 468
Line 52...	Line 52...
`# Hardset the board name, even though we could probably determine it`	`# Hardset the board name, even though we could probably determine it`
`FPGA_VENDOR=xilinx`	`FPGA_VENDOR=xilinx`
`BOARD_NAME=ml501`	`BOARD_NAME=ml501`
`BOARD_DIR=$(PROJECT_ROOT)/boards/$(FPGA_VENDOR)/$(BOARD_NAME)`	`BOARD_DIR=$(PROJECT_ROOT)/boards/$(FPGA_VENDOR)/$(BOARD_NAME)`

`# Export BOARD_PATH for the software makefiles`	`# Export BOARD for the software makefiles`
`BOARD_PATH=$(BOARD_DIR)`	`BOARD=$(FPGA_VENDOR)/$(BOARD_NAME)`
`export BOARD_PATH`	`export BOARD`

`# Paths to other important parts of this test suite`	`# Paths to other important parts of this test suite`
`COMMON_RTL_DIR = $(PROJECT_ROOT)/rtl`	`COMMON_RTL_DIR = $(PROJECT_ROOT)/rtl`
`COMMON_RTL_VERILOG_DIR = $(COMMON_RTL_DIR)/verilog`	`COMMON_RTL_VERILOG_DIR = $(COMMON_RTL_DIR)/verilog`
`#COMMON_RTL_VHDL_DIR = $(COMMON_RTL_DIR)/vhdl`	`#COMMON_RTL_VHDL_DIR = $(COMMON_RTL_DIR)/vhdl`