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https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
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# Set RTL_VERILOG_INCLUDE_DIR so software
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# Set RTL_VERILOG_INCLUDE_DIR so software
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RTL_VERILOG_INCLUDE_DIR=$(shell pwd)/$(BOARD_SW_ROOT)/../rtl/verilog/include
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RTL_VERILOG_INCLUDE_DIR=$(shell pwd)/$(BOARD_SW_ROOT)/../rtl/verilog/include
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# Set the processor capability flags
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# Set the processor capability flags
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# This doesn't work! :-( Need to figure out way to set these and have them
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MARCH_FLAGS =-mhard-mul -mhard-div -mhard-float
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# carry through to things like the liborpsoc driver modules etc.
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#MARCH_FLAGS =-mhard-mul -mhard-div -msoft-float
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#MARCH_FLAGS =-mhard-mul -msoft-div -msoft-float
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#MARCH_FLAGS =-mhard-mul -msoft-div -msoft-float
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#export MARCH_FLAGS
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export MARCH_FLAGS
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# Finally include the main software include file
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# Finally include the main software include file
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include $(SW_ROOT)/Makefile.inc
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include $(SW_ROOT)/Makefile.inc
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