URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [sw/] [board/] [include/] [board.h] - Diff between revs 485 and 486

Rev 485	Rev 486
Line 70...	Line 70...
`#define UART_NUM_CORES 1`	`#define UART_NUM_CORES 1`
`#define UART_BASE_ADDRESSES_CSV UART0_BASE`	`#define UART_BASE_ADDRESSES_CSV UART0_BASE`
`#define UART_BAUD_RATES_CSV UART0_BAUD_RATE`	`#define UART_BAUD_RATES_CSV UART0_BAUD_RATE`


	`//`
	`// i2c_master_slave core driver configuration`
	`//`

	`#define I2C_MASTER_SLAVE_NUM_CORES 2`

	`#define I2C_MASTER_SLAVE_BASE_ADDRESSES_CSV \`
	`I2C_0_BASE, I2C_1_BASE`


`#endif`	`#endif`

`No newline at end of file`	`No newline at end of file`