Subversion Repositories openrisc

XST_FILE=$(DESIGN_NAME).xst

XST_FILE=$(DESIGN_NAME).xst

PRJ_FILE=$(DESIGN_NAME).prj

PRJ_FILE=$(DESIGN_NAME).prj

NGC_FILE=$(DESIGN_NAME).ngc

NGC_FILE=$(DESIGN_NAME).ngc

NETLIST_FILE=$(DESIGN_NAME).v

NETLIST_FILE=$(DESIGN_NAME).v

XST_PRJ_FILE_SRC_DECLARE=verilog work

XST_PRJ_FILE_SRC_DECLARE=verilog work

print-config:

print-config:

        $(Q)echo; echo "\t### Synthesis make configuration ###"; echo

        $(Q)echo; echo "\t### Synthesis make configuration ###"; echo

        $(Q)echo "\tFPGA_PART="$(FPGA_PART)

        $(Q)echo "\tFPGA_PART="$(FPGA_PART)

$(NGC_FILE): $(PRJ_FILE) $(XST_FILE) $(XCF_FILE) $(GENERATED_DEFINES)

$(NGC_FILE): $(PRJ_FILE) $(XST_FILE) $(XCF_FILE) $(GENERATED_DEFINES)

        $(Q)echo; echo "\t#### Running XST ####"; echo;

        $(Q)echo; echo "\t#### Running XST ####"; echo;

        $(Q)(. $(XILINX_SETTINGS_SCRIPT) ; xst -ifn $(XST_FILE) $(XILINX_FLAGS) $(XST_FLAGS) )

        $(Q)(. $(XILINX_SETTINGS_SCRIPT) ; xst -ifn $(XST_FILE) $(XILINX_FLAGS) $(XST_FLAGS) )

        $(Q)echo

        $(Q)echo

# Netlist generation command

# Netlist generation command

$(NETLIST_FILE): $(NGC_FILE)

$(NETLIST_FILE): $(NGC_FILE)

        $(Q)echo; echo "\t#### Generating verilog netlist ####"; echo;

        $(Q)echo; echo "\t#### Generating verilog netlist ####"; echo;

        $(Q)(. $(XILINX_SETTINGS_SCRIPT) ; \

        $(Q)(. $(XILINX_SETTINGS_SCRIPT) ; \

        netgen -sim -aka -dir . -ofmt verilog $< -w $@ )

        netgen -sim -aka -dir . -ofmt verilog $< -w $@ )