Turn off processor monitor's execution trace generation. This helps speed up the simulation (less time writing to files) and avoids creating very large execution logs (in the GBs) for very long simulations.
Turn off processor monitor's execution trace generation. This helps speed up the simulation (less time writing to files) and avoids creating very large execution logs (in the GBs) for very long simulations.
@item SIMULATOR
@item SIMULATOR
Specify simulator to use. Default is Icarus Verilog, can be set to @code{modelsim} to use Mentor Graphics' Modelsim. No others are supported right now.
Specify simulator to use. Default is Icarus Verilog, can be set to @code{modelsim} to use Mentor Graphics' Modelsim. No others are supported right now.
@item MGC_NO_VOPT
When using Modelsim (specifying @code{SIMULATOR=modelsim}), if the version does not include the individual @code{vopt} executable, specify @code{MGC_NO_VOPT=1} when compiling.
@end table
@end table
@node Reference Design Cycle Accurate
@node Reference Design Cycle Accurate
@subsection Cycle Accurate
@subsection Cycle Accurate
@cindex cycle accurate simulation of reference design
@cindex cycle accurate simulation of reference design
@subheading Running Cycle Accurate Regression Test
@subheading Running Cycle Accurate Regression Test
