| Line 160... |
Line 160... |
// Size/type of insn/data cache if implemented
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// Size/type of insn/data cache if implemented
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// (consider available FPGA memory resources)
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// (consider available FPGA memory resources)
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//
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//
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//`define OR1200_IC_1W_512B
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//`define OR1200_IC_1W_512B
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//`define OR1200_IC_1W_4KB
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//`define OR1200_IC_1W_4KB
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`define OR1200_IC_1W_8KB
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//`define OR1200_IC_1W_8KB
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`define OR1200_IC_1W_16KB
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//`define OR1200_DC_1W_4KB
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//`define OR1200_DC_1W_4KB
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`define OR1200_DC_1W_8KB
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//`define OR1200_DC_1W_8KB
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`define OR1200_DC_1W_16KB
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`endif
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`endif
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//////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////
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| Line 1247... |
Line 1249... |
`define OR1200_ICINDXH `OR1200_ICSIZE-1 // 12
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`define OR1200_ICINDXH `OR1200_ICSIZE-1 // 12
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`define OR1200_ICTAGL `OR1200_ICINDXH+1 // 13
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`define OR1200_ICTAGL `OR1200_ICINDXH+1 // 13
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`define OR1200_ICTAG `OR1200_ICSIZE-`OR1200_ICLS // 9
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`define OR1200_ICTAG `OR1200_ICSIZE-`OR1200_ICLS // 9
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`define OR1200_ICTAG_W 20
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`define OR1200_ICTAG_W 20
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`endif
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`endif
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`ifdef OR1200_IC_1W_16KB
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`define OR1200_ICSIZE 14 // 16384
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`define OR1200_ICINDX `OR1200_ICSIZE-2 // 12
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`define OR1200_ICINDXH `OR1200_ICSIZE-1 // 13
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`define OR1200_ICTAGL `OR1200_ICINDXH+1 // 14
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`define OR1200_ICTAG `OR1200_ICSIZE-`OR1200_ICLS // 10
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`define OR1200_ICTAG_W 19
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`endif
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/////////////////////////////////////////////////
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/////////////////////////////////////////////////
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//
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//
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// Data cache (DC)
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// Data cache (DC)
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| Line 1295... |
Line 1305... |
`define OR1200_DCINDXH `OR1200_DCSIZE-1 // 12
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`define OR1200_DCINDXH `OR1200_DCSIZE-1 // 12
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`define OR1200_DCTAGL `OR1200_DCINDXH+1 // 13
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`define OR1200_DCTAGL `OR1200_DCINDXH+1 // 13
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`define OR1200_DCTAG `OR1200_DCSIZE-`OR1200_DCLS // 9
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`define OR1200_DCTAG `OR1200_DCSIZE-`OR1200_DCLS // 9
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`define OR1200_DCTAG_W 20
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`define OR1200_DCTAG_W 20
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`endif
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`endif
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`ifdef OR1200_DC_1W_16KB
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`define OR1200_DCSIZE 14 // 16384
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`define OR1200_DCINDX `OR1200_DCSIZE-2 // 12
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`define OR1200_DCINDXH `OR1200_DCSIZE-1 // 13
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`define OR1200_DCTAGL `OR1200_DCINDXH+1 // 14
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`define OR1200_DCTAG `OR1200_DCSIZE-`OR1200_DCLS // 10
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`define OR1200_DCTAG_W 19
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`endif
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/////////////////////////////////////////////////
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/////////////////////////////////////////////////
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//
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//
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// Store buffer (SB)
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// Store buffer (SB)
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