URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [include/] [or1200_defines.v] - Diff between revs 503 and 504

Rev 503	Rev 504
Line 357...	Line 357...
//`define OR1200_IMPL_ALU_ROTATE	//`define OR1200_IMPL_ALU_ROTATE

`//`	`//`
`// Type of ALU compare to implement`	`// Type of ALU compare to implement`
`//`	`//`
`// Try either one to find what yields`	`// Try to find which synthesizes with`
`// higher clock frequencyin your case.`	`// most efficient logic use or highest speed.`
`//`	`//`
//`define OR1200_IMPL_ALU_COMP1	//`define OR1200_IMPL_ALU_COMP1
`define OR1200_IMPL_ALU_COMP2	//`define OR1200_IMPL_ALU_COMP2
	`define OR1200_IMPL_ALU_COMP3

`//`	`//`
`// Implement Find First/Last '1'`	`// Implement Find First/Last '1'`
`//`	`//`
`define OR1200_IMPL_ALU_FFL1	`define OR1200_IMPL_ALU_FFL1