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| Rev 477 |
Rev 482 |
| Line 1762... |
Line 1762... |
`endif
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`endif
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`define OR1200_DCFGR_RES1 27'd0
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`define OR1200_DCFGR_RES1 27'd0
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///////////////////////////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////////////////////////
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// Boot Address Selection //
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// Boot Address Selection //
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// This only changes where the initial reset occurs. EPH setting is still //
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// //
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// used to determine where vectors are located. //
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// Allows a definable boot address, potentially different to the usual reset //
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// vector to allow for power-on code to be run, if desired. //
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// //
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// OR1200_BOOT_ADR should be the 32-bit address of the boot location //
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// OR1200_BOOT_PCREG_DEFAULT should be ((OR1200_BOOT_ADR-4)>>2) //
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// //
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// For default reset behavior uncomment the settings under the "Boot 0x100" //
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// comment below. //
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// //
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///////////////////////////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////////////////////////
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// Boot from 0xf0000100
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// Boot from 0xf0000100
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//`define OR1200_BOOT_PCREG_DEFAULT 30'h3c00003f
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//`define OR1200_BOOT_PCREG_DEFAULT 30'h3c00003f
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//`define OR1200_BOOT_ADR 32'hf0000100
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//`define OR1200_BOOT_ADR 32'hf0000100
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// Boot from 0x100
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// Boot from 0x100
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