OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [include/] [or1200_defines.v] - Diff between revs 363 and 403

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 363 Rev 403
Line 343... Line 343...
//
//
//`define OR1200_IMPL_ALU_COMP1
//`define OR1200_IMPL_ALU_COMP1
`define OR1200_IMPL_ALU_COMP2
`define OR1200_IMPL_ALU_COMP2
 
 
//
//
 
// Implement Find First/Last '1'
 
//
 
`define OR1200_IMPL_ALU_FFL1
 
 
 
//
// Implement multiplier
// Implement multiplier
//
//
// By default multiplier is implemented
// By default multiplier is implemented
//
//
`define OR1200_MULT_IMPLEMENTED
`define OR1200_MULT_IMPLEMENTED
Line 464... Line 469...
`define OR1200_ALUOP_MOVHI      4'd12
`define OR1200_ALUOP_MOVHI      4'd12
`define OR1200_ALUOP_COMP       4'd13
`define OR1200_ALUOP_COMP       4'd13
`define OR1200_ALUOP_MTSR       4'd14
`define OR1200_ALUOP_MTSR       4'd14
`define OR1200_ALUOP_MFSR       4'd15
`define OR1200_ALUOP_MFSR       4'd15
`define OR1200_ALUOP_CMOV       4'd14
`define OR1200_ALUOP_CMOV       4'd14
`define OR1200_ALUOP_FF1        4'd15
`define OR1200_ALUOP_FFL1       4'd15
 
 
 
 
 
// ALU instructions second opcode field (previously multicycle field in 
 
// machine word)
 
`define OR1200_ALUOP2_POS               9:8
 
`define OR1200_ALUOP2_WIDTH     2
 
 
 
 
//
//
// MACOPs
// MACOPs
//
//
`define OR1200_MACOP_WIDTH      3
`define OR1200_MACOP_WIDTH      3
`define OR1200_MACOP_NOP        3'b000
`define OR1200_MACOP_NOP        3'b000
Line 623... Line 636...
//
//
 
 
// SHROT_OP position in machine word
// SHROT_OP position in machine word
`define OR1200_SHROTOP_POS              7:6
`define OR1200_SHROTOP_POS              7:6
 
 
// ALU instructions multicycle field in machine word
 
`define OR1200_ALUMCYC_POS              9:8
 
 
 
//
//
// Instruction opcode groups (basic)
// Instruction opcode groups (basic)
//
//
`define OR1200_OR32_J                 6'b000000
`define OR1200_OR32_J                 6'b000000
`define OR1200_OR32_JAL               6'b000001
`define OR1200_OR32_JAL               6'b000001
Line 865... Line 875...
//
//
// Debug Unit (DU)
// Debug Unit (DU)
//
//
 
 
// Define it if you want DU implemented
// Define it if you want DU implemented
//`define OR1200_DU_IMPLEMENTED
`define OR1200_DU_IMPLEMENTED
 
 
//
//
// Define if you want HW Breakpoints
// Define if you want HW Breakpoints
// (if HW breakpoints are not implemented
// (if HW breakpoints are not implemented
// only default software trapping is
// only default software trapping is

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.