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[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [or1200/] [or1200_ic_ram.v] - Diff between revs 476 and 477

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Rev 476 Rev 477
Line 103... Line 103...
`else
`else
 
 
//
//
// Instantiation of IC RAM block
// Instantiation of IC RAM block
//
//
`ifdef OR1200_IC_1W_512B
 
   or1200_spram #
   or1200_spram #
     (
     (
      .aw(9),
      .aw(`OR1200_ICINDX),
      .dw(32)
      .dw(32)
      )
      )
`endif
 
`ifdef OR1200_IC_1W_4KB
 
   or1200_spram #
 
     (
 
      .aw(10),
 
      .dw(32)
 
      )
 
`endif
 
`ifdef OR1200_IC_1W_8KB
 
   or1200_spram #
 
     (
 
      .aw(11),
 
      .dw(32)
 
      )
 
`endif
 
`ifdef OR1200_IC_1W_16KB
 
   or1200_spram #
 
     (
 
      .aw(12),
 
      .dw(32)
 
      )
 
`endif
 
   ic_ram0
   ic_ram0
     (
     (
`ifdef OR1200_BIST
`ifdef OR1200_BIST
      // RAM BIST
      // RAM BIST
      .mbist_si_i(mbist_si_i),
      .mbist_si_i(mbist_si_i),

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