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Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [or1200/] [or1200_ic_tag.v] - Diff between revs 476 and 477

Rev 476	Rev 477
Line 113...	Line 113...
`else	`else

`//`	`//`
`// Instantiation of TAG RAM block`	`// Instantiation of TAG RAM block`
`//`	`//`
`ifdef OR1200_IC_1W_512B
`or1200_spram #`	`or1200_spram #`
`(`	`(`
`.aw(5),`	.aw(`OR1200_ICTAG),
`.dw(24)`	.dw(`OR1200_ICTAG_W)
`)`	`)`
`endif
`ifdef OR1200_IC_1W_4KB
`or1200_spram #`
`(`
`.aw(8),`
`.dw(21)`
`)`
`endif
`ifdef OR1200_IC_1W_8KB
`or1200_spram #`
`(`
`.aw(9),`
`.dw(20)`
`)`
`endif
`ifdef OR1200_IC_1W_16KB
`or1200_spram #`
`(`
`.aw(10),`
`.dw(19)`
`)`
`endif
`ic_tag0`	`ic_tag0`
`(`	`(`
`ifdef OR1200_BIST	`ifdef OR1200_BIST
`// RAM BIST`	`// RAM BIST`
`.mbist_si_i(mbist_si_i),`	`.mbist_si_i(mbist_si_i),`