URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

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[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [or1200/] [or1200_parity_chk.v] - Diff between revs 482 and 483

Rev 482	Rev 483
Line 60...	Line 60...

`input [dw-1:0] d_i; // Data word in`	`input [dw-1:0] d_i; // Data word in`
`input p_i; // Parity bit in`	`input p_i; // Parity bit in`
`output err_o; // Error indicator out`	`output err_o; // Error indicator out`

`assign err_o = ((^d_i[dw-1:0]) != p_i);`	`// Is nice if X's don't propegate through here during simulation, so use`
	`// !==`
	`assign err_o = ((^d_i[dw-1:0]) !== p_i);`

`endmodule // or1200_parity_chk`	`endmodule // or1200_parity_chk`


`No newline at end of file`	`No newline at end of file`