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[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [or1200/] [or1200_top.v] - Diff between revs 477 and 483

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Rev 477 Rev 483
Line 83... Line 83... 
 
 
 
 
`ifdef OR1200_BIST
 
`ifdef OR1200_BIST
 
        // RAM BIST
 
        // RAM BIST
 
        mbist_si_i, mbist_so_o, mbist_ctrl_i,
 
        mbist_si_i, mbist_so_o, mbist_ctrl_i,
 
`endif
 
`endif
 
 
 
 
 
 
 
`ifdef OR1200_RAM_PARITY
 
 
 
        mem_parity_err,
 
 
 
`endif
 
 
 
 
 
        // Power Management
 
        // Power Management
 
        pm_cpustall_i,
 
        pm_cpustall_i,
 
        pm_clksd_o, pm_dc_gate_o, pm_ic_gate_o, pm_dmmu_gate_o,
 
        pm_clksd_o, pm_dc_gate_o, pm_ic_gate_o, pm_dmmu_gate_o,
 
        pm_immu_gate_o, pm_tt_gate_o, pm_cpu_gate_o, pm_wakeup_o, pm_lvolt_o
 
        pm_immu_gate_o, pm_tt_gate_o, pm_cpu_gate_o, pm_wakeup_o, pm_lvolt_o
 
 
 
 
Line 193... Line 198... 
output                  pm_tt_gate_o;
 
output                  pm_tt_gate_o;
 
output                  pm_cpu_gate_o;
 
output                  pm_cpu_gate_o;
 
output                  pm_wakeup_o;
 
output                  pm_wakeup_o;
 
output                  pm_lvolt_o;
 
output                  pm_lvolt_o;
 
 
 
 
 
 
 
`ifdef OR1200_RAM_PARITY
 
 
 
output [8:0]             mem_parity_err;
 
 
 
`endif
 
 
 
 
 
 
 
 
 
//
 
//
 
// Internal wires and regs
 
// Internal wires and regs
 
//
 
//
 
 
 
 
Line 423... Line 432... 
wire                    mbist_dmmu_si = mbist_qmem_so;
 
wire                    mbist_dmmu_si = mbist_qmem_so;
 
wire                    mbist_dc_si = mbist_dmmu_so;
 
wire                    mbist_dc_si = mbist_dmmu_so;
 
assign                  mbist_so_o = mbist_dc_so;
 
assign                  mbist_so_o = mbist_dc_so;
 
`endif
 
`endif
 
 
 
 
 
 
 
`ifdef OR1200_RAM_PARITY
 
 
 
wire [1:0]               p_err_dc;
 
 
 
wire [1:0]               p_err_ic;
 
 
 
wire [1:0]               p_err_dmmu;
 
 
 
wire [1:0]               p_err_immu;
 
 
 
wire                    p_err_rf;
 
 
 
 
 
 
 
assign mem_parity_err = {p_err_immu,p_err_dmmu,p_err_ic,p_err_dc,p_err_rf};
 
 
 
 
 
 
 
`endif
 
 
 
 
 
wire  [3:0] icqmem_sel_qmem;
 
wire  [3:0] icqmem_sel_qmem;
 
wire  [3:0] icqmem_tag_qmem;
 
wire  [3:0] icqmem_tag_qmem;
 
wire  [3:0] dcqmem_tag_qmem;
 
wire  [3:0] dcqmem_tag_qmem;
 
 
 
 
 
//
 
//
Line 533... Line 553... 
        .mbist_si_i(mbist_immu_si),
 
        .mbist_si_i(mbist_immu_si),
 
        .mbist_so_o(mbist_immu_so),
 
        .mbist_so_o(mbist_immu_so),
 
        .mbist_ctrl_i(mbist_ctrl_i),
 
        .mbist_ctrl_i(mbist_ctrl_i),
 
`endif
 
`endif
 
 
 
 
 
 
 
`ifdef OR1200_RAM_PARITY
 
 
 
        .p_err(p_err_immu),
 
 
 
`endif
 
 
 
 
 
        // CPU and IMMU
 
        // CPU and IMMU
 
        .ic_en(ic_en),
 
        .ic_en(ic_en),
 
        .immu_en(immu_en),
 
        .immu_en(immu_en),
 
        .supv(supv),
 
        .supv(supv),
 
        .icpu_adr_i(icpu_adr_cpu),
 
        .icpu_adr_i(icpu_adr_cpu),
Line 576... Line 600... 
        // RAM BIST
 
        // RAM BIST
 
        .mbist_si_i(mbist_ic_si),
 
        .mbist_si_i(mbist_ic_si),
 
        .mbist_so_o(mbist_ic_so),
 
        .mbist_so_o(mbist_ic_so),
 
        .mbist_ctrl_i(mbist_ctrl_i),
 
        .mbist_ctrl_i(mbist_ctrl_i),
 
`endif
 
`endif
 
 
 
`ifdef OR1200_RAM_PARITY
 
 
 
        .p_err(p_err_ic),
 
 
 
`endif
 
        // IC and QMEM
 
        // IC and QMEM
 
        .ic_en(ic_en),
 
        .ic_en(ic_en),
 
        .icqmem_adr_i(icqmem_adr_qmem),
 
        .icqmem_adr_i(icqmem_adr_qmem),
 
        .icqmem_cycstb_i(icqmem_cycstb_qmem),
 
        .icqmem_cycstb_i(icqmem_cycstb_qmem),
 
        .icqmem_ci_i(icqmem_ci_qmem),
 
        .icqmem_ci_i(icqmem_ci_qmem),
Line 704... Line 730... 
        .spr_dat_du(spr_dat_du),
 
        .spr_dat_du(spr_dat_du),
 
        .spr_dat_npc(spr_dat_npc),
 
        .spr_dat_npc(spr_dat_npc),
 
        .spr_cs(spr_cs),
 
        .spr_cs(spr_cs),
 
        .spr_we(spr_we),
 
        .spr_we(spr_we),
 
        .mtspr_dc_done(mtspr_dc_done)
 
        .mtspr_dc_done(mtspr_dc_done)
 
 
 
`ifdef OR1200_RAM_PARITY
 
 
 
        // Register file parity error indicator
 
 
 
        , .p_err_rf(p_err_rf)
 
 
 
`endif
 
 
 
 
 
);
 
);
 
 
 
 
 
//
 
//
 
// Instantiation of DMMU
 
// Instantiation of DMMU
 
//
 
//
Line 721... Line 752... 
        .mbist_si_i(mbist_dmmu_si),
 
        .mbist_si_i(mbist_dmmu_si),
 
        .mbist_so_o(mbist_dmmu_so),
 
        .mbist_so_o(mbist_dmmu_so),
 
        .mbist_ctrl_i(mbist_ctrl_i),
 
        .mbist_ctrl_i(mbist_ctrl_i),
 
`endif
 
`endif
 
 
 
 
 
 
 
`ifdef OR1200_RAM_PARITY
 
 
 
        .p_err(p_err_dmmu),
 
 
 
`endif
 
 
 
 
 
        // CPU i/f
 
        // CPU i/f
 
        .dc_en(dc_en),
 
        .dc_en(dc_en),
 
        .dmmu_en(dmmu_en),
 
        .dmmu_en(dmmu_en),
 
        .supv(supv),
 
        .supv(supv),
 
        .dcpu_adr_i(dcpu_adr_cpu),
 
        .dcpu_adr_i(dcpu_adr_cpu),
Line 759... Line 794... 
        // RAM BIST
 
        // RAM BIST
 
        .mbist_si_i(mbist_dc_si),
 
        .mbist_si_i(mbist_dc_si),
 
        .mbist_so_o(mbist_dc_so),
 
        .mbist_so_o(mbist_dc_so),
 
        .mbist_ctrl_i(mbist_ctrl_i),
 
        .mbist_ctrl_i(mbist_ctrl_i),
 
`endif
 
`endif
 
 
 
`ifdef OR1200_RAM_PARITY
 
 
 
        .p_err(p_err_dc),
 
 
 
`endif
 
        // DC and QMEM
 
        // DC and QMEM
 
        .dc_en(dc_en),
 
        .dc_en(dc_en),
 
        .dcqmem_adr_i(dcqmem_adr_qmem),
 
        .dcqmem_adr_i(dcqmem_adr_qmem),
 
        .dcqmem_cycstb_i(dcqmem_cycstb_qmem),
 
        .dcqmem_cycstb_i(dcqmem_cycstb_qmem),
 
        .dcqmem_ci_i(dcqmem_ci_qmem),
 
        .dcqmem_ci_i(dcqmem_ci_qmem),

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