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[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [or1200/] [or1200_wb_biu.v] - Diff between revs 360 and 363

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Rev 360 Rev 363
Line 335... Line 335...
         wb_err_cnt     <=  1'b0;
         wb_err_cnt     <=  1'b0;
         wb_rty_cnt     <=  1'b0;
         wb_rty_cnt     <=  1'b0;
      end
      end
      else begin
      else begin
         // WB ack toggle counter
         // WB ack toggle counter
         if (wb_fsm_state_cur == wb_fsm_idle | !clmode)
         if (wb_fsm_state_cur == wb_fsm_idle | !(|clmode))
           wb_ack_cnt   <=  1'b0;
           wb_ack_cnt   <=  1'b0;
         else if (wb_stb_o & wb_ack)
         else if (wb_stb_o & wb_ack)
           wb_ack_cnt   <=  !wb_ack_cnt;
           wb_ack_cnt   <=  !wb_ack_cnt;
         // WB err toggle counter
         // WB err toggle counter
         if (wb_fsm_state_cur == wb_fsm_idle | !clmode)
         if (wb_fsm_state_cur == wb_fsm_idle | !(|clmode))
           wb_err_cnt   <=  1'b0;
           wb_err_cnt   <=  1'b0;
         else if (wb_stb_o & wb_err_i)
         else if (wb_stb_o & wb_err_i)
           wb_err_cnt   <=  !wb_err_cnt;
           wb_err_cnt   <=  !wb_err_cnt;
         // WB rty toggle counter
         // WB rty toggle counter
         if (wb_fsm_state_cur == wb_fsm_idle | !clmode)
         if (wb_fsm_state_cur == wb_fsm_idle | !(|clmode))
           wb_rty_cnt   <=  1'b0;
           wb_rty_cnt   <=  1'b0;
         else if (wb_stb_o & wb_rty_i)
         else if (wb_stb_o & wb_rty_i)
           wb_rty_cnt   <=  !wb_rty_cnt;
           wb_rty_cnt   <=  !wb_rty_cnt;
      end
      end
   end
   end
Line 369... Line 369...
         if (biu_stb_i & !biu_cab_i & biu_ack_o)
         if (biu_stb_i & !biu_cab_i & biu_ack_o)
           biu_stb_reg  <=  1'b0;
           biu_stb_reg  <=  1'b0;
         else
         else
           biu_stb_reg  <=  biu_stb_i;
           biu_stb_reg  <=  biu_stb_i;
         // BIU ack toggle counter
         // BIU ack toggle counter
         if (wb_fsm_state_cur == wb_fsm_idle | !clmode)
         if (wb_fsm_state_cur == wb_fsm_idle | !(|clmode))
           biu_ack_cnt  <=  1'b0 ;
           biu_ack_cnt  <=  1'b0 ;
         else if (biu_ack_o)
         else if (biu_ack_o)
           biu_ack_cnt  <=  !biu_ack_cnt ;
           biu_ack_cnt  <=  !biu_ack_cnt ;
         // BIU err toggle counter
         // BIU err toggle counter
         if (wb_fsm_state_cur == wb_fsm_idle | !clmode)
         if (wb_fsm_state_cur == wb_fsm_idle | !(|clmode))
           biu_err_cnt  <=  1'b0 ;
           biu_err_cnt  <=  1'b0 ;
         else if (wb_err_i & biu_err_o)
         else if (wb_err_i & biu_err_o)
           biu_err_cnt  <=  !biu_err_cnt ;
           biu_err_cnt  <=  !biu_err_cnt ;
         // BIU rty toggle counter
         // BIU rty toggle counter
         if (wb_fsm_state_cur == wb_fsm_idle | !clmode)
         if (wb_fsm_state_cur == wb_fsm_idle | !(|clmode))
           biu_rty_cnt  <=  1'b0 ;
           biu_rty_cnt  <=  1'b0 ;
         else if (biu_rty)
         else if (biu_rty)
           biu_rty_cnt  <=  !biu_rty_cnt ;
           biu_rty_cnt  <=  !biu_rty_cnt ;
`ifdef OR1200_WB_RETRY
`ifdef OR1200_WB_RETRY
         if (biu_ack_o | biu_err_o)
         if (biu_ack_o | biu_err_o)

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