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[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [uart16550/] [uart_regs.v] - Diff between revs 360 and 363

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Rev 360 Rev 363
Line 361... Line 361...
   // FIFO signals
   // FIFO signals
   reg                                                                          tf_push;
   reg                                                                          tf_push;
   reg                                                                          rf_pop;
   reg                                                                          rf_pop;
   wire [`UART_FIFO_REC_WIDTH-1:0]                                               rf_data_out;
   wire [`UART_FIFO_REC_WIDTH-1:0]                                               rf_data_out;
   wire                                                                         rf_error_bit; // an error (parity or framing) is inside the fifo
   wire                                                                         rf_error_bit; // an error (parity or framing) is inside the fifo
 
   wire                              rf_overrun;
 
   wire                              rf_push_pulse;
   wire [`UART_FIFO_COUNTER_W-1:0]                                               rf_count;
   wire [`UART_FIFO_COUNTER_W-1:0]                                               rf_count;
   wire [`UART_FIFO_COUNTER_W-1:0]                                               tf_count;
   wire [`UART_FIFO_COUNTER_W-1:0]                                               tf_count;
   wire [2:0]                                                                    tstate;
   wire [2:0]                                                                    tstate;
   wire [3:0]                                                                    rstate;
   wire [3:0]                                                                    rstate;
   wire [9:0]                                                                    counter_t;
   wire [9:0]                                                                    counter_t;
Line 404... Line 406...
   always @(dl or dlab or ier or iir or scratch
   always @(dl or dlab or ier or iir or scratch
            or lcr or lsr or msr or rf_data_out or wb_addr_i or wb_re_i)   // asynchrounous reading
            or lcr or lsr or msr or rf_data_out or wb_addr_i or wb_re_i)   // asynchrounous reading
     begin
     begin
        case (wb_addr_i)
        case (wb_addr_i)
          `UART_REG_RB   : wb_dat_o = dlab ? dl[`UART_DL1] : rf_data_out[10:3];
          `UART_REG_RB   : wb_dat_o = dlab ? dl[`UART_DL1] : rf_data_out[10:3];
          `UART_REG_IE  : wb_dat_o = dlab ? dl[`UART_DL2] : ier;
          `UART_REG_IE  : wb_dat_o = dlab ? dl[`UART_DL2] : {4'd0,ier};
          `UART_REG_II  : wb_dat_o = {4'b1100,iir};
          `UART_REG_II  : wb_dat_o = {4'b1100,iir};
          `UART_REG_LC  : wb_dat_o = lcr;
          `UART_REG_LC  : wb_dat_o = lcr;
          `UART_REG_LS  : wb_dat_o = lsr;
          `UART_REG_LS  : wb_dat_o = lsr;
          `UART_REG_MS  : wb_dat_o = msr;
          `UART_REG_MS  : wb_dat_o = msr;
          `UART_REG_SR  : wb_dat_o = scratch;
          `UART_REG_SR  : wb_dat_o = scratch;

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