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| Rev 360 |
Rev 363 |
| Line 190... |
Line 190... |
reg [fifo_pointer_w-1:0] bottom;
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reg [fifo_pointer_w-1:0] bottom;
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reg [fifo_counter_w-1:0] count;
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reg [fifo_counter_w-1:0] count;
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reg overrun;
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reg overrun;
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wire [fifo_pointer_w-1:0] top_plus_1 = top + 1'b1;
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wire [fifo_pointer_w-1:0] top_plus_1 = top + 4'h1;
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raminfr #(fifo_pointer_w,8,fifo_depth) rfifo
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raminfr #(fifo_pointer_w,8,fifo_depth) rfifo
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(.clk(clk),
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(.clk(clk),
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.we(push),
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.we(push),
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.a(top),
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.a(top),
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| Line 206... |
Line 206... |
always @(posedge clk or posedge wb_rst_i) // synchronous FIFO
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always @(posedge clk or posedge wb_rst_i) // synchronous FIFO
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begin
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begin
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if (wb_rst_i)
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if (wb_rst_i)
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begin
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begin
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top <= 0;
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top <= 0;
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bottom <= 1'b0;
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bottom <= 0;
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count <= 0;
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count <= 0;
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fifo[0] <= 0;
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fifo[0] <= 0;
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fifo[1] <= 0;
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fifo[1] <= 0;
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fifo[2] <= 0;
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fifo[2] <= 0;
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fifo[3] <= 0;
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fifo[3] <= 0;
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| Line 228... |
Line 228... |
fifo[15] <= 0;
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fifo[15] <= 0;
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end
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end
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else
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else
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if (fifo_reset) begin
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if (fifo_reset) begin
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top <= 0;
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top <= 0;
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bottom <= 1'b0;
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bottom <= 0;
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count <= 0;
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count <= 0;
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fifo[0] <= 0;
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fifo[0] <= 0;
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fifo[1] <= 0;
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fifo[1] <= 0;
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fifo[2] <= 0;
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fifo[2] <= 0;
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fifo[3] <= 0;
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fifo[3] <= 0;
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| Line 254... |
Line 254... |
case ({push, pop})
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case ({push, pop})
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2'b10 : if (count<fifo_depth) // overrun condition
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2'b10 : if (count<fifo_depth) // overrun condition
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begin
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begin
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top <= top_plus_1;
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top <= top_plus_1;
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fifo[top] <= data_in[2:0];
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fifo[top] <= data_in[2:0];
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count <= count + 1'b1;
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count <= count + 5'd1;
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end
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end
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2'b01 : if(count>0)
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2'b01 : if(count>0)
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begin
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begin
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fifo[bottom] <= 0;
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fifo[bottom] <= 0;
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bottom <= bottom + 1'b1;
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bottom <= bottom + 4'd1;
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count <= count - 1'b1;
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count <= count - 5'd1;
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end
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end
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2'b11 : begin
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2'b11 : begin
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bottom <= bottom + 1'b1;
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bottom <= bottom + 4'd1;
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top <= top_plus_1;
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top <= top_plus_1;
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fifo[top] <= data_in[2:0];
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fifo[top] <= data_in[2:0];
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end
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end
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default: ;
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default: ;
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endcase
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endcase
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