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[/] [openrisc/] [trunk/] [orpsocv2/] [sim/] [bin/] [Makefile] - Diff between revs 351 and 354

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Rev 351 Rev 354
Line 378... Line 378...
ifeq ($(SIMULATOR), $(SILOS))
ifeq ($(SIMULATOR), $(SILOS))
SIM_COMMANDCOMPILE=echo
SIM_COMMANDCOMPILE=echo
SIM_COMMANDRUN=$(SILOS) -b -w +width_mistmatches -f $(SIM_RUN_DIR)/$(GENERATED_COMMANDFILE) -l $(SIM_RESULTS_DIR)/$$TEST-$(SILOS)-out.log $(EVENT_SIM_FLAGS)
SIM_COMMANDRUN=$(SILOS) -b -w +width_mistmatches -f $(SIM_RUN_DIR)/$(GENERATED_COMMANDFILE) -l $(SIM_RESULTS_DIR)/$$TEST-$(SILOS)-out.log $(EVENT_SIM_FLAGS)
endif
endif
 
 
 
DIVIDE_LINE=
 
 
# Names of memory files used in simulation
# Names of memory files used in simulation
SIM_FLASH_MEM_FILE="flash.in"
SIM_FLASH_MEM_FILE="flash.in"
FLASH_MEM_FILE_SUFFIX="-twobyte-sizefirst.hex"
FLASH_MEM_FILE_SUFFIX="-twobyte-sizefirst.hex"
SIM_SRAM_MEM_FILE="sram.vmem"
SIM_SRAM_MEM_FILE="sram.vmem"
Line 775... Line 776...
###############################################################################
###############################################################################
.PHONY: prepare-vlt-profiled
.PHONY: prepare-vlt-profiled
prepare-vlt-profiled: $(SIM_VLT_DIR)/OrpsocMain.gcda clean vlt-restore-profileoutput prepare-rtl vlt-model-links $(SIM_VLT_DIR)/Vorpsoc_top
prepare-vlt-profiled: $(SIM_VLT_DIR)/OrpsocMain.gcda clean vlt-restore-profileoutput prepare-rtl vlt-model-links $(SIM_VLT_DIR)/Vorpsoc_top
 
 
$(SIM_VLT_DIR)/OrpsocMain.gcda: $(SIM_VLT_DIR)/Vorpsoc_top-for-profiling prepare-sw-uart-printf
$(SIM_VLT_DIR)/OrpsocMain.gcda: $(SIM_VLT_DIR)/Vorpsoc_top-for-profiling prepare-sw-uart-printf
        $(MAKE) -C $(SW_DIR)/dhry dhry-nocache-O2 NUM_RUNS=200
        $(MAKE) -C $(SW_DIR)/dhry dhry.elf NUM_RUNS=2000
        $(SIM_VLT_DIR)/Vorpsoc_top -f $(SW_DIR)/dhry/dhry-nocache-O2.or32 -v -l sim.log --crash-monitor
        $(SIM_VLT_DIR)/Vorpsoc_top -f $(SW_DIR)/dhry/dhry.elf -v -l sim.log --crash-monitor
 
 
.PHONY: $(SIM_VLT_DIR)/Vorpsoc_top-for-profiling
.PHONY: $(SIM_VLT_DIR)/Vorpsoc_top-for-profiling
$(SIM_VLT_DIR)/Vorpsoc_top-for-profiling:
$(SIM_VLT_DIR)/Vorpsoc_top-for-profiling:
        $(MAKE) prepare-vlt VLT_DO_PROFILING=1
        $(MAKE) prepare-vlt VLT_DO_PROFILING=1
 
 
Line 793... Line 794...
 
 
################################################################################
################################################################################
# Architectural simulator test loop
# Architectural simulator test loop
################################################################################
################################################################################
 
 
# Verilator defaults to internal memories
 
sim-tests: prepare-sw
sim-tests: prepare-sw
        @if [ ! -d $(SIM_RESULTS_DIR) ]; then mkdir -p $(SIM_RESULTS_DIR); fi
        @if [ ! -d $(SIM_RESULTS_DIR) ]; then mkdir -p $(SIM_RESULTS_DIR); fi
        @echo
        @echo
        @echo "Beginning loop that will complete the following tests: $(TESTS)"
        @echo "Beginning loop that will complete the following tests: $(TESTS)"
        @echo
        @echo
Line 805... Line 805...
                echo "################################################################################"; \
                echo "################################################################################"; \
                echo; \
                echo; \
                echo "\t#### Current test: $$TEST ####"; echo; \
                echo "\t#### Current test: $$TEST ####"; echo; \
                echo "\t#### Compiling software ####"; echo; \
                echo "\t#### Compiling software ####"; echo; \
                CURRENT_TEST_SW_DIR=$(SW_DIR)/`echo $$TEST | cut -d "-" -f 1`; \
                CURRENT_TEST_SW_DIR=$(SW_DIR)/`echo $$TEST | cut -d "-" -f 1`; \
                $(MAKE) -C $$CURRENT_TEST_SW_DIR $$TEST.vmem $(TEST_SW_MAKE_OPTS) UART_PRINTF=1; \
                $(MAKE) -C $$CURRENT_TEST_SW_DIR $$TEST.elf $(TEST_SW_MAKE_OPTS) UART_PRINTF=1; \
                rm -f $(SIM_RUN_DIR)/$(SIM_SRAM_MEM_FILE); \
                ln -s $$CURRENT_TEST_SW_DIR/$$TEST.elf $(SIM_RUN_DIR)/.; \
                ln -s $$CURRENT_TEST_SW_DIR/$$TEST.or32 $(SIM_RUN_DIR)/.; \
 
                echo;echo "\t#### Launching architectural simulator ####"; \
                echo;echo "\t#### Launching architectural simulator ####"; \
                time -p $(ARCH_SIM_EXE) --nosrv -f $(SIM_BIN_DIR)/$(ARCH_SIM_CFG_FILE) $$TEST.or32 > $(SIM_RESULTS_DIR)/$$TEST-or1ksim.log 2>&1; \
                time -p $(ARCH_SIM_EXE) --nosrv -f $(SIM_BIN_DIR)/$(ARCH_SIM_CFG_FILE) $$TEST.elf > $(SIM_RESULTS_DIR)/$$TEST-or1ksim.log 2>&1; \
                if [ $$? -gt 0 ]; then exit $$?; fi; \
                if [ $$? -gt 0 ]; then exit $$?; fi; \
                if [ `tail -n 10 $(SIM_RESULTS_DIR)/$$TEST-or1ksim.log | grep -c $(SIM_SUCCESS_MESSAGE)` -gt 0 ]; then \
                if [ `tail -n 10 $(SIM_RESULTS_DIR)/$$TEST-or1ksim.log | grep -c $(SIM_SUCCESS_MESSAGE)` -gt 0 ]; then \
                        TEST_RESULT=1; \
                        TEST_RESULT=1; \
                fi; \
                fi; \
                echo; echo "\t####"; \
                echo; echo "\t####"; \
Line 821... Line 820...
                        echo "\t#### Test $$TEST PASSED ####";TESTS_PASSED=`expr $$TESTS_PASSED + 1`;\
                        echo "\t#### Test $$TEST PASSED ####";TESTS_PASSED=`expr $$TESTS_PASSED + 1`;\
                else    echo "\t#### Test $$TEST FAILED ####";\
                else    echo "\t#### Test $$TEST FAILED ####";\
                fi; \
                fi; \
                echo "\t####"; echo; \
                echo "\t####"; echo; \
                TESTS_PERFORMED=`expr $$TESTS_PERFORMED + 1`;\
                TESTS_PERFORMED=`expr $$TESTS_PERFORMED + 1`;\
                unlink $(SIM_RUN_DIR)/$$TEST.or32; \
                unlink $(SIM_RUN_DIR)/$$TEST.elf; \
        done; \
        done; \
        echo "Test results: "$$TESTS_PASSED" out of "$$TESTS_PERFORMED" tests passed"; echo
        echo "Test results: "$$TESTS_PASSED" out of "$$TESTS_PERFORMED" tests passed"; echo
 
 
 
 
 
 

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