Line 163... |
Line 163... |
# interfaced flash memory. This causes significant increase in the time taken
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# interfaced flash memory. This causes significant increase in the time taken
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# for simulation as the program to test is first loaded out of SPI flash memory
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# for simulation as the program to test is first loaded out of SPI flash memory
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# and into SDRAM before it is executed. Although this more closely mimics the
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# and into SDRAM before it is executed. Although this more closely mimics the
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# behaviour of the hardware, for simulation purposes it is purely time-consuming
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# behaviour of the hardware, for simulation purposes it is purely time-consuming
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# however it may be useful to track down any problems with this boot-loading
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# however it may be useful to track down any problems with this boot-loading
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# process. Therefore, becuase it enables SDRAM memory, ir also enables the flash
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# process. Therefore, becuase it enables SDRAM memory, it also enables the flash
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# memory model and SPI controller inside ORPSoC.
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# memory model and SPI controller inside ORPSoC.
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#
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#
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# Ethernet
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# Ethernet
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#
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#
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# Ethernet is disabled by default. This is due to the fact that it is not
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# Ethernet is disabled by default. This is due to the fact that it is not
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Line 384... |
Line 384... |
if [ ! -z $$UART_PRINTF ]; \
|
if [ ! -z $$UART_PRINTF ]; \
|
then echo "+define+UART_PRINTF" >> $(SIM_RUN_DIR)/$(ICARUS_COMMAND_FILE).generated; \
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then echo "+define+UART_PRINTF" >> $(SIM_RUN_DIR)/$(ICARUS_COMMAND_FILE).generated; \
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fi; \
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fi; \
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echo "\`define TEST_NAME_STRING \"$$TEST\"" > $(SIM_RUN_DIR)/test_define.v; \
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echo "\`define TEST_NAME_STRING \"$$TEST\"" > $(SIM_RUN_DIR)/test_define.v; \
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echo "\`define TEST_RESULTS_DIR \"$(SIM_RESULTS_DIR)/\" " >> $(SIM_RUN_DIR)/test_define.v; \
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echo "\`define TEST_RESULTS_DIR \"$(SIM_RESULTS_DIR)/\" " >> $(SIM_RUN_DIR)/test_define.v; \
|
if [ ! -z $$SIM_LOGGING ]; then \
|
if [ -z $$NO_SIM_LOGGING ]; then \
|
echo "\`define OR1200_DISPLAY_ARCH_STATE" >> $(SIM_RUN_DIR)/test_define.v; \
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echo "\`define OR1200_DISPLAY_ARCH_STATE" >> $(SIM_RUN_DIR)/test_define.v; \
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fi; \
|
fi; \
|
echo ; \
|
echo ; \
|
echo "\t#### Compiling RTL ####"; \
|
echo "\t#### Compiling RTL ####"; \
|
rm -f $(SIM_RUN_DIR)/a.out; \
|
rm -f $(SIM_RUN_DIR)/a.out; \
|