Line 581... |
Line 581... |
VLT_SYSC_DEBUG_DEFINE = VLT_DEBUG=1
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VLT_SYSC_DEBUG_DEFINE = VLT_DEBUG=1
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endif
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endif
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# If set on the command line we build the cycle accurate model which will generate verilator-specific profiling information. This is useful for checking the efficiency of the model - not really useful for checking code or the function of the model.
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# If set on the command line we build the cycle accurate model which will generate verilator-specific profiling information. This is useful for checking the efficiency of the model - not really useful for checking code or the function of the model.
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ifdef VLT_ORPSOC_PROFILING
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ifdef VLT_ORPSOC_PROFILING
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VLT_CPPFLAGS=-g -pg
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VLT_CPPFLAGS +=-pg
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VLT_DEBUG_OPTIONS +=-profile-cfuncs
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VLT_DEBUG_OPTIONS +=-profile-cfuncs
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else
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else
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VLT_CPPFLAGS=-fbranch-probabilities -fvpt -funroll-loops -fpeel-loops -ftracer -O3
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#VLT_CPPFLAGS +=-fbranch-probabilities -fvpt -funroll-loops -fpeel-loops -ftracer -O3
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VLT_CPPFLAGS +=-fprofile-use -Wcoverage-mismatch
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#VLT_CPPFLAGS=-Wall
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#VLT_CPPFLAGS=-Wall
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endif
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endif
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# Set VLT_IN_GDB=1 when making if going to run the cycle accurate model executable in GDB to check suspect behavior. This also removes optimisation.
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ifdef VLT_IN_GDB
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VLT_CPPFLAGS +=-g -O0
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else
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# The default optimisation flag applied to all of the cycle accurate model files
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VLT_CPPFLAGS +=-O3
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endif
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ifdef VLT_DO_PROFILING
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ifdef VLT_DO_PROFILING
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VLT_CPPFLAGS=-O3 -ftest-coverage -fprofile-generate
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VLT_CPPFLAGS +=-ftest-coverage -fprofile-arcs -fprofile-generate
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endif
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endif
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# VCD Enabled by default when building, enable it at runtime
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# VCD Enabled by default when building, enable it at runtime
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#ifdef VCD
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#ifdef VCD
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VLT_FLAGS +=-trace
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VLT_FLAGS +=-trace
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Line 607... |
Line 616... |
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# This is the list of extra models we'll issue make commands for
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# This is the list of extra models we'll issue make commands for
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# Included is the SystemPerl trace model
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# Included is the SystemPerl trace model
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SYSC_MODELS_BUILD=$(SYSC_MODELS) $(VLT_TRACEOBJ)
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SYSC_MODELS_BUILD=$(SYSC_MODELS) $(VLT_TRACEOBJ)
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prepare-vlt: prepare-rtl vlt_model_links $(SIM_VLT_DIR)/Vorpsoc_top
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prepare-vlt: prepare-rtl vlt-model-links $(SIM_VLT_DIR)/Vorpsoc_top
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@echo;echo "\tCycle-accurate model compiled successfully"
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@echo;echo "\tCycle-accurate model compiled successfully"
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@echo;echo "\tRun the executable with the -h option for usage instructions:";echo
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@echo;echo "\tRun the executable with the -h option for usage instructions:";echo
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$(SIM_VLT_DIR)/Vorpsoc_top -h
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$(SIM_VLT_DIR)/Vorpsoc_top -h
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@echo;echo
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@echo;echo
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Line 686... |
Line 695... |
-e s!\$$BENCH_DIR!$(BENCH_VERILOG_DIR)! \
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-e s!\$$BENCH_DIR!$(BENCH_VERILOG_DIR)! \
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-e s!\$$RTL_DIR!$(RTL_VERILOG_DIR)! \
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-e s!\$$RTL_DIR!$(RTL_VERILOG_DIR)! \
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-e s!\$$BACKEND_DIR!$(BACKEND_DIR)! \
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-e s!\$$BACKEND_DIR!$(BACKEND_DIR)! \
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-e \\!^//.*\$$!d -e \\!^\$$!d;
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-e \\!^//.*\$$!d -e \\!^\$$!d;
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.PHONY: vlt_model_links
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.PHONY: vlt-model-links
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vlt_model_links:
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vlt-model-links:
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# Link all the required system C model files into the verilator work dir
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# Link all the required system C model files into the verilator work dir
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@echo; echo "\tLinking SystemC model source to verilator build path"; echo
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@echo; echo "\tLinking SystemC model source to verilator build path"; echo
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@if [ ! -d $(SIM_VLT_DIR) ]; then mkdir $(SIM_VLT_DIR); fi
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@if [ ! -d $(SIM_VLT_DIR) ]; then mkdir $(SIM_VLT_DIR); fi
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$(Q)cd $(SIM_VLT_DIR) && \
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$(Q)cd $(SIM_VLT_DIR) && \
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for SYSCMODEL in $(SYSC_MODELS); do \
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for SYSCMODEL in $(SYSC_MODELS); do \
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Line 740... |
Line 749... |
# To run this, first run a "make prepare-vlt VLT_DO_PROFILING=1" then do a
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# To run this, first run a "make prepare-vlt VLT_DO_PROFILING=1" then do a
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# "make clean" and then a "make prepare-vlt_profiled"
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# "make clean" and then a "make prepare-vlt_profiled"
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# This new make target copies athe results of the profiling back to the right
|
# This new make target copies athe results of the profiling back to the right
|
# paths before we create everything again
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# paths before we create everything again
|
###############################################################################
|
###############################################################################
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prepare-vlt-profiled: vlt_restore-profileoutput prepare-rtl vlt-model-links $(SIM_VLT_DIR)/Vorpsoc_top
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.PHONY: prepare-vlt-profiled
|
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prepare-vlt-profiled: $(SIM_VLT_DIR)/OrpsocMain.gcda clean vlt-restore-profileoutput prepare-rtl vlt-model-links $(SIM_VLT_DIR)/Vorpsoc_top
|
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|
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$(SIM_VLT_DIR)/OrpsocMain.gcda: $(SIM_VLT_DIR)/Vorpsoc_top-for-profiling prepare-sw-uart-printf
|
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$(MAKE) -C $(SW_DIR)/dhry dhry-nocache-O2 NUM_RUNS=200
|
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$(SIM_VLT_DIR)/Vorpsoc_top -f $(SW_DIR)/dhry/dhry-nocache-O2.or32 -v -l sim.log --crash-monitor
|
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.PHONY: $(SIM_VLT_DIR)/Vorpsoc_top-for-profiling
|
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$(SIM_VLT_DIR)/Vorpsoc_top-for-profiling:
|
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$(MAKE) prepare-vlt VLT_DO_PROFILING=1
|
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|
|
.PHONY: vlt-restore-profileoutput
|
vlt-restore-profileoutput:
|
vlt-restore-profileoutput:
|
@echo;echo "\tRestoring profiling outputs"; echo
|
@echo;echo "\tRestoring profiling outputs"; echo
|
$(Q)mkdir -p ../vlt
|
$(Q)mkdir -p ../vlt
|
$(Q)cp /tmp/*.gc* $(SIM_VLT_DIR)
|
$(Q)cp /tmp/*.gc* $(SIM_VLT_DIR)
|
$(Q)cp /tmp/*.gc* $(BENCH_SYSC_SRC_DIR)
|
$(Q)cp /tmp/*.gc* $(BENCH_SYSC_SRC_DIR)
|