| Line 62... |
Line 62... |
#
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#
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# make sim-tests
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# make sim-tests
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#
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#
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# Run all the software tests in the architectural simulator
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# Run all the software tests in the architectural simulator
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#
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#
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#
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# Debugging modes:
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#
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# make rtl-debug
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#
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# Enable a GDB stub integrated into the simulation via VPI. This will
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# start a simulation, then the GDB server, and allow the user to connect
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# using the OpenRISC GDB port. It should provide the same functionality
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# as GDB to a physical target, although a little slower.
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# It is provided here as an example of how to compile and run an OpenRISC
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# model at RTL level with support for debugging from GDB.
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# UART output from printf() is enabled by default. The model loads with
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# the dhrystone test running as default, but can be changed by defining
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# VPI_TEST_SW at the command line. Logging of the processor's execution
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# is also disabled by default to speed up simulation.
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#
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# Simulation results:
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# Simulation results:
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#
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#
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# The results and output of the event-driven simulations are in the
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# The results and output of the event-driven simulations are in the
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# results path, in parallel to the simulation run and bin paths.
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# results path, in parallel to the simulation run and bin paths.
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Line 307... |
# A rule with UART_PRINTF hard defined ... used by verilator make sw
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# A rule with UART_PRINTF hard defined ... used by verilator make sw
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prepare_sw_uart_printf:
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prepare_sw_uart_printf:
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@$(MAKE) -C $(SW_DIR)/support all UART_PRINTF=1 $(TEST_SW_MAKE_OPTS)
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@$(MAKE) -C $(SW_DIR)/support all UART_PRINTF=1 $(TEST_SW_MAKE_OPTS)
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@$(MAKE) -C $(SW_DIR)/utils all
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@$(MAKE) -C $(SW_DIR)/utils all
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prepare_dirs:
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@if [ ! -d $(SIM_RESULTS_DIR) ]; then mkdir -p $(SIM_RESULTS_DIR); fi
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# Rough guide to how these tests work:
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# Rough guide to how these tests work:
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# First, the couple of custom, required, software tools under sw/utils are
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# First, the couple of custom, required, software tools under sw/utils are
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# compiled, and then the software library files.
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# compiled, and then the software library files.
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# Next the few verilog files that need preperation are taken care of.
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# Next the few verilog files that need preperation are taken care of.
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Line 355... |
# software and linking of the resulting hex file to the run path, etc.
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# software and linking of the resulting hex file to the run path, etc.
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# Main RAM setup - (RTL simulation with Icarus/NCSim only!):
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# Main RAM setup - (RTL simulation with Icarus/NCSim only!):
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# Define USE_SDRAM to enable the external SDRAM, otherwise the simulation
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# Define USE_SDRAM to enable the external SDRAM, otherwise the simulation
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# defaults to an internal SRAM. Eg. $ make rtl-tests USE_SDRAM=1 VCD=1
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# defaults to an internal SRAM. Eg. $ make rtl-tests USE_SDRAM=1 VCD=1
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# Verilator defaults to internal memories
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# Verilator defaults to internal memories
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rtl-tests: prepare_sw prepare_rtl
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rtl-tests: prepare_sw_uart_printf prepare_rtl prepare_dirs
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@if [ ! -d $(SIM_RESULTS_DIR) ]; then mkdir -p $(SIM_RESULTS_DIR); fi
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@echo
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@echo
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@echo "Beginning loop that will complete the following tests: $(TESTS)"
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@echo "Beginning loop that will complete the following tests: $(TESTS)"
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@echo
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@echo
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@for TEST in $(TESTS); do \
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@for TEST in $(TESTS); do \
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echo "################################################################################"; \
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echo "################################################################################"; \
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Line 384... |
if [ ! -z $$UART_PRINTF ]; \
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if [ ! -z $$UART_PRINTF ]; \
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then echo "+define+UART_PRINTF" >> $(SIM_RUN_DIR)/$(ICARUS_COMMAND_FILE).generated; \
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then echo "+define+UART_PRINTF" >> $(SIM_RUN_DIR)/$(ICARUS_COMMAND_FILE).generated; \
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fi; \
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fi; \
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echo "\`define TEST_NAME_STRING \"$$TEST\"" > $(SIM_RUN_DIR)/test_define.v; \
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echo "\`define TEST_NAME_STRING \"$$TEST\"" > $(SIM_RUN_DIR)/test_define.v; \
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echo "\`define TEST_RESULTS_DIR \"$(SIM_RESULTS_DIR)/\" " >> $(SIM_RUN_DIR)/test_define.v; \
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echo "\`define TEST_RESULTS_DIR \"$(SIM_RESULTS_DIR)/\" " >> $(SIM_RUN_DIR)/test_define.v; \
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if [ -z $$NO_SIM_LOGGING ]; then \
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if [ ! -z $$SIM_LOGGING ]; then \
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echo "\`define OR1200_DISPLAY_ARCH_STATE" >> $(SIM_RUN_DIR)/test_define.v; \
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echo "\`define OR1200_DISPLAY_ARCH_STATE" >> $(SIM_RUN_DIR)/test_define.v; \
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fi; \
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fi; \
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echo ; \
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echo ; \
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echo "\t#### Compiling RTL ####"; \
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echo "\t#### Compiling RTL ####"; \
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rm -f $(SIM_RUN_DIR)/a.out; \
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rm -f $(SIM_RUN_DIR)/a.out; \
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Line 409... |
echo "Test results: "$$TESTS_PASSED" out of "$$TESTS_PERFORMED" tests passed"; echo
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echo "Test results: "$$TESTS_PASSED" out of "$$TESTS_PERFORMED" tests passed"; echo
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# Use NCSIM instead of icarus
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# Use NCSIM instead of icarus
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rtl-nc-tests: prepare_sw prepare_rtl
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rtl-nc-tests: prepare_sw prepare_rtl prepare_dirs
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@if [ ! -d $(SIM_RESULTS_DIR) ]; then mkdir -p $(SIM_RESULTS_DIR); fi
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@echo
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@echo
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@echo "Beginning loop that will complete the following tests: $(TESTS)"
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@echo "Beginning loop that will complete the following tests: $(TESTS)"
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@echo
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@echo
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@for TEST in $(TESTS); do \
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@for TEST in $(TESTS); do \
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echo "################################################################################"; \
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echo "################################################################################"; \
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| Line 447... |
Line 463... |
TESTS_PERFORMED=`expr $$TESTS_PERFORMED + 1`;\
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TESTS_PERFORMED=`expr $$TESTS_PERFORMED + 1`;\
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done; \
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done; \
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echo "Test results: "$$TESTS_PASSED" out of "$$TESTS_PERFORMED" tests passed"; echo
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echo "Test results: "$$TESTS_PASSED" out of "$$TESTS_PERFORMED" tests passed"; echo
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################################################################################
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################################################################################
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# RTL simulation in Icarus with GDB stub via VPI for debugging
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################################################################################
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# This compiles a version of the system which starts up the dhrystone nocache
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# test, and launches the simulator with a VPI module that provides a GDB stub
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# allowing the OpenRISC compatible GDB to connect and debug the system.
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# The launched test can be changed by defining VPI_TEST_SW on the make line
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VPI_DIR=$(BENCH_VERILOG_DIR)/vpi
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VPI_C_DIR=$(VPI_DIR)/c
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VPI_VERILOG_DIR=$(VPI_DIR)/verilog
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VPI_LIB_NAME=jp_vpi
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ICARUS_VPI_OPTS=-M$(VPI_C_DIR) -m$(VPI_LIB_NAME)
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VPI_TEST_SW ?= dhry-nocache-O2
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prepare_vpi:
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## Build the VPI library
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$(MAKE) -C $(VPI_C_DIR) $(VPI_LIB_NAME)
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clean_vpi:
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$(MAKE) -C $(VPI_C_DIR) clean
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rtl-debug: prepare_sw_uart_printf prepare_rtl prepare_vpi prepare_dirs
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## Prepare the software for the test
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@echo "\t#### Compiling software ####"; echo; \
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CURRENT_TEST_SW_DIR=$(SW_DIR)/`echo $(VPI_TEST_SW) | cut -d "-" -f 1`; \
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$(MAKE) -C $$CURRENT_TEST_SW_DIR $(VPI_TEST_SW) $(TEST_SW_MAKE_OPTS); \
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rm -f $(SIM_RUN_DIR)/$(SIM_FLASH_MEM_FILE); \
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rm -f $(SIM_RUN_DIR)/$(SIM_SRAM_MEM_FILE); \
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ln -s $$CURRENT_TEST_SW_DIR/$(VPI_TEST_SW)$(FLASH_MEM_FILE_SUFFIX) $(SIM_RUN_DIR)/$(SIM_FLASH_MEM_FILE); \
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ln -s $$CURRENT_TEST_SW_DIR/$(VPI_TEST_SW).vmem $(SIM_RUN_DIR)/$(SIM_SRAM_MEM_FILE)
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## Generate the icarus script we'll compile with
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@sed < $(SIM_BIN_DIR)/$(ICARUS_COMMAND_FILE) > $(SIM_RUN_DIR)/$(ICARUS_COMMAND_FILE).generated \
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-e s!\$$BENCH_DIR!$(BENCH_VERILOG_DIR)! \
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-e s!\$$RTL_DIR!$(RTL_VERILOG_DIR)! \
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-e s!\$$BACKEND_DIR!$(BACKEND_DIR)! \
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-e \\!^//.*\$$!d -e \\!^\$$!d
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## Add a couple of extra defines to the icarus compile script
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@echo "+define+TEST_DEFINE_FILE=\"test_define.v\"" >> $(SIM_RUN_DIR)/$(ICARUS_COMMAND_FILE).generated
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## The define that enables the VPI debug module
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@echo "+define+VPI_DEBUG_ENABLE" >> $(SIM_RUN_DIR)/$(ICARUS_COMMAND_FILE).generated
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@if [ ! -z $$VCD ];then echo "+define+VCD" >> $(SIM_RUN_DIR)/$(ICARUS_COMMAND_FILE).generated;fi
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## Unless NO_UART_PRINTF=1 we use printf via the UART
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@if [ -z $$NO_UART_PRINTF ];then echo "+define+UART_PRINTF" >> $(SIM_RUN_DIR)/$(ICARUS_COMMAND_FILE).generated; fi
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@echo "\`define TEST_NAME_STRING \"$(VPI_TEST_SW)-vpi\"" > $(SIM_RUN_DIR)/test_define.v
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@echo "\`define TEST_RESULTS_DIR \"$(SIM_RESULTS_DIR)/\" " >> $(SIM_RUN_DIR)/test_define.v
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@if [ -z $$NO_SIM_LOGGING ]; then echo "\`define OR1200_DISPLAY_ARCH_STATE" >> $(SIM_RUN_DIR)/test_define.v; fi
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@echo
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@echo "\t#### Compiling RTL ####"
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@rm -f $(SIM_RUN_DIR)/a.out
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@$(ICARUS) -sorpsoc_testbench -c $(SIM_RUN_DIR)/$(ICARUS_COMMAND_FILE).generated $(EVENT_SIM_FLAGS)
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@echo
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@echo "\t#### Beginning simulation with VPI debug module enabled ####"; echo
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@$(ICARUS_VVP) $(ICARUS_VPI_OPTS) -l $(SIM_RESULTS_DIR)/$(VPI_TEST_SW)-vvp-out.log a.out
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################################################################################
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# Verilator model build rules
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# Verilator model build rules
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################################################################################
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################################################################################
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SYSC_LIB_ARCH_DIR=$(shell ls $$SYSTEMC | grep "lib-")
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SYSC_LIB_ARCH_DIR=$(shell ls $$SYSTEMC | grep "lib-")
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| Line 554... |
Line 624... |
################################################################################
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################################################################################
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# Verilator test loop
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# Verilator test loop
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################################################################################
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################################################################################
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# Verilator defaults to internal memories
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# Verilator defaults to internal memories
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vlt-tests: prepare_sw_uart_printf prepare_rtl prepare_vlt
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vlt-tests: prepare_sw_uart_printf prepare_rtl prepare_dirs prepare_vlt
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@if [ ! -d $(SIM_RESULTS_DIR) ]; then mkdir -p $(SIM_RESULTS_DIR); fi
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@echo
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@echo
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@echo "Beginning loop that will complete the following tests: $(TESTS)"
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@echo "Beginning loop that will complete the following tests: $(TESTS)"
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@echo
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@echo
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@for TEST in $(TESTS); do \
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@for TEST in $(TESTS); do \
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echo "################################################################################"; \
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echo "################################################################################"; \
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| Line 626... |
Line 695... |
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################################################################################
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################################################################################
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# Cleaning rules
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# Cleaning rules
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################################################################################
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################################################################################
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clean: clean-sw clean-sim clean-sysc clean-rtl
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clean: clean-sw clean-sim clean-sysc clean-rtl clean_vpi
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clean-sw:
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clean-sw:
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@for TEST in $(TESTS); do \
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@for TEST in $(TESTS); do \
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echo "Current test: $$TEST"; \
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echo "Current test: $$TEST"; \
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CURRENT_TEST_SW_DIR=$(SW_DIR)/`echo $$TEST | cut -d "-" -f 1`; \
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CURRENT_TEST_SW_DIR=$(SW_DIR)/`echo $$TEST | cut -d "-" -f 1`; \
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