URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [sim/] [bin/] [Makefile] - Diff between revs 6 and 36

Rev 6	Rev 36
Line 626...	Line 626...

`################################################################################`	`################################################################################`
`# Cleaning rules`	`# Cleaning rules`
`################################################################################`	`################################################################################`

`clean: clean-sw clean-sim`	`clean: clean-sw clean-sim clean-sysc clean-rtl`

`clean-sw:`	`clean-sw:`
`@for TEST in $(TESTS); do \`	`@for TEST in $(TESTS); do \`
`echo "Current test: $$TEST"; \`	`echo "Current test: $$TEST"; \`
CURRENT_TEST_SW_DIR=$(SW_DIR)/`echo $$TEST \| cut -d "-" -f 1`; \	CURRENT_TEST_SW_DIR=$(SW_DIR)/`echo $$TEST \| cut -d "-" -f 1`; \
Line 640...	Line 640...
`$(MAKE) -C $(SW_DIR)/support clean`	`$(MAKE) -C $(SW_DIR)/support clean`
`$(MAKE) -C $(SW_DIR)/utils clean`	`$(MAKE) -C $(SW_DIR)/utils clean`

`clean-sim:`	`clean-sim:`
`rm -rf $(SIM_RESULTS_DIR) $(SIM_RUN_DIR)/. $(SIM_VLT_DIR)`	`rm -rf $(SIM_RESULTS_DIR) $(SIM_RUN_DIR)/. $(SIM_VLT_DIR)`

	`clean-sysc:`
	`# Clean away dependency files generated by verilator`
	`rm -rf $(BENCH_SYSC_SRC_DIR)/*.d`

	`clean-rtl:`
	`# Clean away temporary verilog source files`
	`rm -f $(RTL_VERILOG_DIR)/intercon.v`
	`rm -f $(RTL_VERILOG_DIR)/components/wb_sdram_ctrl/wb_sdram_ctrl_fsm.v`
`No newline at end of file`	`No newline at end of file`