| Line 172... |
Line 172... |
#
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#
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VOPT_ARGS=$(QUIET) -suppress 2241
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VOPT_ARGS=$(QUIET) -suppress 2241
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# If VCD dump is desired, tell Modelsim not to optimise
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# If VCD dump is desired, tell Modelsim not to optimise
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# away everything.
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# away everything.
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ifeq ($(VCD), 1)
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ifeq ($(VCD), 1)
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#VOPT_ARGS=-voptargs="+acc=rnp"
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# If certain versions of modelsim don't have the vopt executable, define
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# MGC_NO_VOPT=1 when running.
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ifeq ($(MGC_NO_VOPT), 1)
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MGC_VSIM_ARGS +=-voptargs="+acc=rnp"
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MGC_VOPT_CMD=echo
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MGC_VSIM_TGT=orpsoc_testbench
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else
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VOPT_ARGS=+acc=rnpqv
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VOPT_ARGS=+acc=rnpqv
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MGC_VOPT_CMD= vopt $(QUIET) $(RTL_TESTBENCH_TOP) $(VOPT_ARGS) -o tb
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MGC_VSIM_TGT=tb
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endif
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|
|
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else
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|
|
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ifeq ($(MGC_NO_VOPT), 1)
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MGC_VSIM_ARGS += -vopt
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MGC_VOPT_CMD=echo
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MGC_VSIM_TGT=orpsoc_testbench
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else
|
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VOPT_ARGS=+acc=rnpqv
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MGC_VOPT_CMD= vopt $(QUIET) $(RTL_TESTBENCH_TOP) $(VOPT_ARGS) -o tb
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MGC_VSIM_TGT=tb
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endif
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|
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endif
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endif
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# VSIM commands
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# VSIM commands
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# Suppressed warnings - 3009: Failed to open $readmemh() file
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# Suppressed warnings - 3009: Failed to open $readmemh() file
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# Suppressed warnings - 3009: Module 'blah' does not have a `timescale
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# Suppressed warnings - 3009: Module 'blah' does not have a `timescale
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# directive in effect, but previous modules do.
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# directive in effect, but previous modules do.
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# Suppressed warnings - 8598: Non-positive replication multiplier inside
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# Suppressed warnings - 8598: Non-positive replication multiplier inside
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# concat. Replication will be ignored
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# concat. Replication will be ignored
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MGC_VSIM_ARGS= -suppress 7 -suppress 3009 -suppress 8598 -c $(QUIET) \
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MGC_VSIM_ARGS += -suppress 7 -suppress 3009 -suppress 8598 -c $(QUIET) \
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-do "set StdArithNoWarnings 1; run -all; exit"
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-do "set StdArithNoWarnings 1; run -all; exit"
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# Options required when VPI option used
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# Options required when VPI option used
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ifeq ($(VPI), 1)
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ifeq ($(VPI), 1)
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MGC_VPI_LIB=$(VPI_SRC_C_DIR)/$(MODELTECH_VPILIB)
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MGC_VPI_LIB=$(VPI_SRC_C_DIR)/$(MODELTECH_VPILIB)
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MGC_VSIM_ARGS += -pli $(VPI_SRC_C_DIR)/$(MODELTECH_VPILIB)
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MGC_VSIM_ARGS += -pli $(VPI_SRC_C_DIR)/$(MODELTECH_VPILIB)
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| Line 319... |
Line 342... |
# Single compile rule
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# Single compile rule
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.PHONY : $(MODELSIM)
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.PHONY : $(MODELSIM)
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$(MODELSIM): modelsim_bench.scr $(TEST_DEFINES_VLG) $(MGC_VPI_LIB) work
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$(MODELSIM): modelsim_bench.scr $(TEST_DEFINES_VLG) $(MGC_VPI_LIB) work
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$(Q)echo; echo "\t### Compiling testbench ###"; echo
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$(Q)echo; echo "\t### Compiling testbench ###"; echo
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$(Q)vlog $(QUIET) -nologo -incr $(BENCH_TOP) -f $<
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$(Q)vlog $(QUIET) -nologo -incr $(BENCH_TOP) -f $<
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$(Q)vopt $(QUIET) $(RTL_TESTBENCH_TOP) $(VOPT_ARGS) -o tb
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$(Q)$(MGC_VOPT_CMD)
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$(Q)echo; echo "\t### Launching simulation ###"; echo
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$(Q)echo; echo "\t### Launching simulation ###"; echo
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$(Q)vsim $(MGC_VSIM_ARGS) tb
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$(Q)vsim $(VOPT_ARGS) $(MGC_VSIM_ARGS) $(MGC_VSIM_TGT)
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|
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#
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#
|
# Icarus Verilog simulator build and run rules
|
# Icarus Verilog simulator build and run rules
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#
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#
|
.PHONY: $(ICARUS_SCRIPT)
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.PHONY: $(ICARUS_SCRIPT)
|
