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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [Makefile.inc] - Diff between revs 360 and 361

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Rev 360 Rev 361
Line 65... Line 65...
DESIGN_PROCESSED_VERILOG_DEFINES=../include/$(DESIGN_NAME)-defines.h
DESIGN_PROCESSED_VERILOG_DEFINES=../include/$(DESIGN_NAME)-defines.h
 
 
OR1200_VERILOG_DEFINES=../../rtl/verilog/include/or1200_defines.v
OR1200_VERILOG_DEFINES=../../rtl/verilog/include/or1200_defines.v
OR1200_PROCESSED_VERILOG_DEFINES=../include/or1200-defines.h
OR1200_PROCESSED_VERILOG_DEFINES=../include/or1200-defines.h
 
 
#PROCESSED_DEFINES=$(DESIGN_PROCESSED_VERILOG_DEFINES) $(OR1200_PROCESSED_VERILOG_DEFINES)
PROCESSED_DEFINES=$(DESIGN_PROCESSED_VERILOG_DEFINES) $(OR1200_PROCESSED_VERILOG_DEFINES)
PROCESSED_DEFINES= $(OR1200_PROCESSED_VERILOG_DEFINES)
 
 
 
ELF_DEPENDS+=$(VECTORS_OBJ) $(PROCESSED_DEFINES) $(SUPPORT_FILES)
ELF_DEPENDS+=$(VECTORS_OBJ) $(PROCESSED_DEFINES) $(SUPPORT_FILES)
 
 
# Set V=1 when calling make to enable verbose output
# Set V=1 when calling make to enable verbose output
# mainly for debugging purposes.
# mainly for debugging purposes.

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