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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [Makefile.inc] - Diff between revs 360 and 361
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Rev 361 |
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DESIGN_PROCESSED_VERILOG_DEFINES=../include/$(DESIGN_NAME)-defines.h
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DESIGN_PROCESSED_VERILOG_DEFINES=../include/$(DESIGN_NAME)-defines.h
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OR1200_VERILOG_DEFINES=../../rtl/verilog/include/or1200_defines.v
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OR1200_VERILOG_DEFINES=../../rtl/verilog/include/or1200_defines.v
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OR1200_PROCESSED_VERILOG_DEFINES=../include/or1200-defines.h
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OR1200_PROCESSED_VERILOG_DEFINES=../include/or1200-defines.h
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#PROCESSED_DEFINES=$(DESIGN_PROCESSED_VERILOG_DEFINES) $(OR1200_PROCESSED_VERILOG_DEFINES)
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PROCESSED_DEFINES=$(DESIGN_PROCESSED_VERILOG_DEFINES) $(OR1200_PROCESSED_VERILOG_DEFINES)
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PROCESSED_DEFINES= $(OR1200_PROCESSED_VERILOG_DEFINES)
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ELF_DEPENDS+=$(VECTORS_OBJ) $(PROCESSED_DEFINES) $(SUPPORT_FILES)
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ELF_DEPENDS+=$(VECTORS_OBJ) $(PROCESSED_DEFINES) $(SUPPORT_FILES)
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# Set V=1 when calling make to enable verbose output
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# Set V=1 when calling make to enable verbose output
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# mainly for debugging purposes.
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# mainly for debugging purposes.
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