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[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [i2c_master_slave/] [i2c_master_slave.c] - Diff between revs 403 and 486

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Rev 403 Rev 486
Line 10... Line 10...
 
 
#include "board.h"
#include "board.h"
#include "cpu-utils.h"
#include "cpu-utils.h"
#include "i2c_master_slave.h"
#include "i2c_master_slave.h"
 
 
 
 
 
// Ensure board.h defines I2C_MASTER_SLAVE_NUM_CORES and 
 
// I2C_MASTER_SLAVE_BASE_ADDRESSES_CSV which should be the base address values
 
// separated with commas
 
#ifdef I2C_MASTER_SLAVE_NUM_CORES
 
 
 
const int I2C_MASTER_SLAVE_BASE_ADR[I2C_MASTER_SLAVE_NUM_CORES] = {
 
        I2C_MASTER_SLAVE_BASE_ADDRESSES_CSV };
 
#else
 
 
 
const int I2C_MASTER_SLAVE_BASE_ADR[1] = {-1};
 
 
 
#endif
 
 
inline unsigned char i2c_master_slave_read_reg(int core, unsigned char addr)
inline unsigned char i2c_master_slave_read_reg(int core, unsigned char addr)
{
{
        return REG8((i2c_base_adr[core] + addr));
        return REG8((I2C_MASTER_SLAVE_BASE_ADR[core] + addr));
}
}
 
 
inline void i2c_master_slave_write_reg(int core, unsigned char addr,
inline void i2c_master_slave_write_reg(int core, unsigned char addr,
                                       unsigned char data)
                                       unsigned char data)
{
{
        REG8((i2c_base_adr[core] + addr)) = data;
        REG8((I2C_MASTER_SLAVE_BASE_ADR[core] + addr)) = data;
}
}
 
 
int i2c_master_slave_wait_for_busy(int core)
int i2c_master_slave_wait_for_busy(int core)
{
{
        while (1) {
        while (1) {
Line 186... Line 200...
                // set command (write) and stop
                // set command (write) and stop
                i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_CR,
                i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_CR,
                                           I2C_MASTER_SLAVE_CR_WRITE |
                                           I2C_MASTER_SLAVE_CR_WRITE |
                                           I2C_MASTER_SLAVE_CR_STOP);
                                           I2C_MASTER_SLAVE_CR_STOP);
 
 
        return 0;
        return i2c_master_slave_wait_for_transfer(core);
 
 
}
}
 
 
/***********************************************************
/***********************************************************
* i2c_master_slave_master_stop                             *
* i2c_master_slave_master_stop                             *
*                                                          *
*                                                          *
Line 236... Line 251...
        if (i2c_master_slave_wait_for_transfer(core))
        if (i2c_master_slave_wait_for_transfer(core))
                return 1;
                return 1;
 
 
        *data = i2c_master_slave_read_reg(core, I2C_MASTER_SLAVE_RXR);
        *data = i2c_master_slave_read_reg(core, I2C_MASTER_SLAVE_RXR);
 
 
        return 0;
        return i2c_master_slave_wait_for_transfer(core);
}
}
 
 
/***********************************************************
/***********************************************************
* i2c_master_slave_ack_interrupt                           *
* i2c_master_slave_ack_interrupt                           *
*                                                          *
*                                                          *

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