URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [or1200/] [int.c] - Diff between revs 486 and 530

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 486	Rev 530
Line 23...	Line 23...

`return 0;`	`return 0;`
`}`	`}`

`/* Add interrupt handler */`	`/* Add interrupt handler */`
`int int_add(unsigned long vect, void (* handler)(void ), void arg)`	`int int_add(unsigned long irq, void (* handler)(void ), void arg)`
`{`	`{`
`if(vect >= MAX_INT_HANDLERS)`	`if(irq >= MAX_INT_HANDLERS)`
`return -1;`	`return -1;`

`int_handlers[vect].handler = handler;`	`int_handlers[irq].handler = handler;`
`int_handlers[vect].arg = arg;`	`int_handlers[irq].arg = arg;`

`mtspr(SPR_PICMR, mfspr(SPR_PICMR) \| (0x00000001L << vect));`	`mtspr(SPR_PICMR, mfspr(SPR_PICMR) \| (0x00000001L << irq));`

`return 0;`	`return 0;`
`}`	`}`

`/* Disable interrupt */`	`/* Disable interrupt */`
`int int_disable(unsigned long vect)`	`int int_disable(unsigned long irq)`
`{`	`{`
`if(vect >= MAX_INT_HANDLERS)`	`if(irq >= MAX_INT_HANDLERS)`
`return -1;`	`return -1;`

`mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(0x00000001L << vect));`	`mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(0x00000001L << irq));`

`return 0;`	`return 0;`
`}`	`}`

`/* Enable interrupt */`	`/* Enable interrupt */`
`int int_enable(unsigned long vect)`	`int int_enable(unsigned long irq)`
`{`	`{`
`if(vect >= MAX_INT_HANDLERS)`	`if(irq >= MAX_INT_HANDLERS)`
`return -1;`	`return -1;`

`mtspr(SPR_PICMR, mfspr(SPR_PICMR) \| (0x00000001L << vect));`	`mtspr(SPR_PICMR, mfspr(SPR_PICMR) \| (0x00000001L << irq));`

`return 0;`	`return 0;`
`}`	`}`

`/* Main interrupt handler */`	`/* Main interrupt handler */`
Line 69...	Line 69...
`mtspr(SPR_PICSR, 0);`	`mtspr(SPR_PICSR, 0);`

`while(i < 32) {`	`while(i < 32) {`
`if((picsr & (0x01L << i)) && (int_handlers[i].handler != 0)) {`	`if((picsr & (0x01L << i)) && (int_handlers[i].handler != 0)) {`
`(*int_handlers[i].handler)(int_handlers[i].arg);`	`(*int_handlers[i].handler)(int_handlers[i].arg);`
	`#ifdef OR1200_INT_CHECK_BIT_CLEARED`
	`// Ensure PICSR bit is cleared, incase it takes some time for the`
	`// IRQ line going low to propagate back to PIC`
	`while (mfspr(SPR_PICSR) & (0x00000001L << i))`
	`#endif`
`mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(0x00000001L << i));`	`mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(0x00000001L << i));`
`}`	`}`
`i++;`	`i++;`
`}`	`}`
`}`	`}`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [or1200/] [int.c] - Diff between revs 486 and 530