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Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] [or1200/] [sim/] [or1200-except.S] - Diff between revs 393 and 412

Rev 393	Rev 412
Line 517...	Line 517...
`l.movhi r5, 0xff00 /* Put an illegal instruction in r5 */`	`l.movhi r5, 0xff00 /* Put an illegal instruction in r5 */`
`l.sw 0x4(r0), r5 /* Write illegal instruction to RAM addr 0x4 */`	`l.sw 0x4(r0), r5 /* Write illegal instruction to RAM addr 0x4 */`
`l.mtspr r0,r0,SPR_ICBIR /* Invalidate line 0 of cache */`	`l.mtspr r0,r0,SPR_ICBIR /* Invalidate line 0 of cache */`
`/* Call 0x4, illegal opcode instruction */`	`/* Call 0x4, illegal opcode instruction */`
`l.ori r6, r0, 0x4`	`l.ori r6, r0, 0x4`
`l.jalr r6 /* Jump to address 0x4, will land on an illegal instruction */`	`l.jalr r6 /* Jump to address 0x4, landing on an illegal instruction */`
`l.addi r12,r12,1 /* Increment 2nd exception counter */`	`l.addi r12,r12,1 /* Increment 2nd exception counter */`
`l.nop`
`l.nop /* Should return here */`	`l.nop /* Should return here */`
	`l.nop`

`/* Test in delay slot */`	`/* Test in delay slot */`

`l.movhi r5, 0xff00 /* Put an illegal instruction in r5 */`	`l.movhi r5, 0xff00 /* Put an illegal instruction in r5 */`
`l.sw 0x4(r0), r5 /* Write illegal instruction to RAM addr 0x4 */`	`l.sw 0x4(r0), r5 /* Write illegal instruction to RAM addr 0x4 */`