URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] [or1200/] [sim/] [or1200-ffl1.S] - Diff between revs 425 and 499

Rev 425	Rev 499
Line 36...	Line 36...

`#include "spr-defs.h"`	`#include "spr-defs.h"`
`#include "board.h"`	`#include "board.h"`
`#include "or1200-defines.h"`	`#include "or1200-defines.h"`

`// Check MAC unit is enabled before trying to run this test`
`#ifndef OR1200_IMPL_ALU_FFL1`
`# error`
`# error Find First/Last '1' isntructions not enabled.`
`# error`
`#endif`


`/* =================================================== [ exceptions ] === */`	`/* =================================================== [ exceptions ] === */`
`.section .vectors, "ax"`	`.section .vectors, "ax"`


Line 64...	Line 57...
`l.movhi r4, hi(_start)`	`l.movhi r4, hi(_start)`
`l.ori r4, r4, lo(_start)`	`l.ori r4, r4, lo(_start)`
`l.jr r4`	`l.jr r4`
`l.nop`	`l.nop`

	`/* ---[ 0x700: Illegal instruction exception ]-------------------------- */`
	`.org 0x700`
	`#ifndef OR1200_IMPL_ALU_FFL1`
	`// No problem - instruction not supported`
	`l.movhi r3, hi(0x8000000d)`
	`l.ori r3, r3, lo(0x8000000d)`
	`l.nop 0x2`
	`l.ori r3, r0, 0`
	`#else`
	`l.ori r3, r0, 1`
	`#endif`
	`l.nop 0x1`


`/* =================================================== [ text ] === */`	`/* =================================================== [ text ] === */`
`.section .text`	`.section .text`

`/* =================================================== [ start ] === */`	`/* =================================================== [ start ] === */`