OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] [or1200/] [sim/] [or1200-mmu.c] - Diff between revs 477 and 485

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 477 Rev 485
Line 92... Line 92...
// development on one or the other.
// development on one or the other.
 
 
// Set this to 1 to enable the IMMU tests
// Set this to 1 to enable the IMMU tests
#define DO_IMMU_TESTS 1
#define DO_IMMU_TESTS 1
// Set this to 1 to enable the DMMU tests
// Set this to 1 to enable the DMMU tests
#define DO_DMMU_TESTS 1
#define DO_DMMU_TESTS 0
 
 
// Symbols defined in linker script
// Symbols defined in linker script
extern unsigned long _endtext;
extern unsigned long _endtext;
extern unsigned long _stext;
extern unsigned long _stext;
extern unsigned long _edata;
extern unsigned long _edata;
Line 112... Line 112...
/* Define RAM physical location and size
/* Define RAM physical location and size
Bottom half will be used for this program, the rest
Bottom half will be used for this program, the rest
will be used for testing */
will be used for testing */
#define RAM_START   0x00000000
#define RAM_START   0x00000000
// Assume only 2MB memory
// Assume only 2MB memory
 
#ifndef RAM_SIZE
#define RAM_SIZE    0x00200000
#define RAM_SIZE    0x00200000
 
#endif
 
 
#define VM_BASE 0xc0000000
#define VM_BASE 0xc0000000
 
 
/* What is the last address in ram that is used by this program */
/* What is the last address in ram that is used by this program */
#define TEXT_START_ADD start_text_addr
#define TEXT_START_ADD start_text_addr

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.