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[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] [or1200/] [sim/] [or1200-ticksyscall.S] - Diff between revs 425 and 477

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Rev 425 Rev 477
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        The test do the following:
        The test do the following:
        Setup tick interrupts to occur regularly, and then do a bunch of l.sys
        Setup tick interrupts to occur regularly, and then do a bunch of l.sys
        systems calls, checking that they all occur OK
        systems calls, checking that they all occur OK
 
 
 
        Note: if this test appears to continue without counting, it's most
 
        likely due to a tick counter value that's too small (processor is
 
        executing too slowly, due to lack of cache or similar) and always
 
        interrupting before execution can continue. Try increasing the
 
        TICK_COUNTER_VALUE #define to give the processor time to continue.
 
 
        Julius Baxter, julius@opencores.org
        Julius Baxter, julius@opencores.org
*/
*/
//////////////////////////////////////////////////////////////////////
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//// Copyright (C) 2010 Authors and OPENCORES.ORG                 ////
//// Copyright (C) 2010 Authors and OPENCORES.ORG                 ////
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//// Public License along with this source; if not, download it   ////
//// Public License along with this source; if not, download it   ////
//// from http://www.opencores.org/lgpl.shtml                     ////
//// from http://www.opencores.org/lgpl.shtml                     ////
////                                                              ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
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#define TICK_COUNTER_VALUE 8
 
 
#define TICK_COUNTER_VALUE 16
 
 
 
 
 
 
/* =================================================== [ exceptions ] === */
/* =================================================== [ exceptions ] === */
        .section .vectors, "ax"
        .section .vectors, "ax"

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