URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] [sdram/] [sim/] [sdram-cols.c] - Diff between revs 393 and 426

Rev 393	Rev 426
Line 4...	Line 4...
`* Tests accessing beginning and middle of column. Should detect any mismatch`	`* Tests accessing beginning and middle of column. Should detect any mismatch`
`* between SDRAM row size configuration.`	`* between SDRAM row size configuration.`
`*`	`*`
`*/`	`*/`

`#include "or32-utils.h"`	`#include "cpu-utils.h"`
`#include "board.h"`	`#include "board.h"`
`#include "sdram.h"`	`#include "sdram.h"`

`// Start some rows after the program/data`	`// Start some rows after the program/data`