URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [OpenRISC_SIM_GCC/] [arch/] [reset.S] - Diff between revs 621 and 675

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Rev 621	Rev 675
Line 50...	Line 50...
`.org 0x200`	`.org 0x200`
`_except_200:`	`_except_200:`
`l.nop`	`l.nop`
`l.sw -4(r1), r3`	`l.sw -4(r1), r3`
`l.addi r3, r0, 0x200`	`l.addi r3, r0, 0x200`
`l.sw -132(r1), r3`	`l.sw -260(r1), r3`
`l.lwz r3, -4(r1)`	`l.lwz r3, -4(r1)`
`l.j vPortMiscIntHandler`	`l.j vPortMiscIntHandler`
`l.nop`	`l.nop`


`.org 0x300`	`.org 0x300`
`_except_300:`	`_except_300:`
`l.nop`	`l.nop`
`l.sw -4(r1), r3`	`l.sw -4(r1), r3`
`l.addi r3, r0, 0x300`	`l.addi r3, r0, 0x300`
`l.sw -132(r1), r3`	`l.sw -260(r1), r3`
`l.lwz r3, -4(r1)`	`l.lwz r3, -4(r1)`
`l.j vPortMiscIntHandler`	`l.j vPortMiscIntHandler`
`l.nop`	`l.nop`


`.org 0x400`	`.org 0x400`
`_except_400:`	`_except_400:`
`l.nop`	`l.nop`
`l.sw -4(r1), r3`	`l.sw -4(r1), r3`
`l.addi r3, r0, 0x400`	`l.addi r3, r0, 0x400`
`l.sw -132(r1), r3`	`l.sw -260(r1), r3`
`l.lwz r3, -4(r1)`	`l.lwz r3, -4(r1)`
`l.j vPortMiscIntHandler`	`l.j vPortMiscIntHandler`
`l.nop`	`l.nop`


Line 90...	Line 90...
`.org 0x600`	`.org 0x600`
`_except_600:`	`_except_600:`
`l.nop`	`l.nop`
`l.sw -4(r1), r3`	`l.sw -4(r1), r3`
`l.addi r3, r0, 0x600`	`l.addi r3, r0, 0x600`
`l.sw -132(r1), r3`	`l.sw -260(r1), r3`
`l.lwz r3, -4(r1)`	`l.lwz r3, -4(r1)`
`l.j vPortMiscIntHandler`	`l.j vPortMiscIntHandler`
`l.nop`	`l.nop`


`.org 0x700`	`.org 0x700`
`_except_700:`	`_except_700:`
`l.nop`	`l.nop`
`l.sw -4(r1), r3`	`l.sw -4(r1), r3`
`l.addi r3, r0, 0x700`	`l.addi r3, r0, 0x700`
`l.sw -132(r1), r3`	`l.sw -260(r1), r3`
`l.lwz r3, -4(r1)`	`l.lwz r3, -4(r1)`
`l.j vPortMiscIntHandler`	`l.j vPortMiscIntHandler`
`l.nop`	`l.nop`


Line 119...	Line 119...
`.org 0x900`	`.org 0x900`
`_except_900:`	`_except_900:`
`l.nop`	`l.nop`
`l.sw -4(r1), r3`	`l.sw -4(r1), r3`
`l.addi r3, r0, 0x900`	`l.addi r3, r0, 0x900`
`l.sw -132(r1), r3`	`l.sw -260(r1), r3`
`l.lwz r3, -4(r1)`	`l.lwz r3, -4(r1)`
`l.j vPortMiscIntHandler`	`l.j vPortMiscIntHandler`
`l.nop`	`l.nop`


`.org 0xa00`	`.org 0xa00`
`_except_a00:`	`_except_a00:`
`l.nop`	`l.nop`
`l.sw -4(r1), r3`	`l.sw -4(r1), r3`
`l.addi r3, r0, 0xa00`	`l.addi r3, r0, 0xa00`
`l.sw -132(r1), r3`	`l.sw -260(r1), r3`
`l.lwz r3, -4(r1)`	`l.lwz r3, -4(r1)`
`l.j vPortMiscIntHandler`	`l.j vPortMiscIntHandler`
`l.nop`	`l.nop`


`.org 0xb00`	`.org 0xb00`
`_except_b00:`	`_except_b00:`
`l.nop`	`l.nop`
`l.sw -4(r1), r3`	`l.sw -4(r1), r3`
`l.addi r3, r0, 0xb00`	`l.addi r3, r0, 0xb00`
`l.sw -132(r1), r3`	`l.sw -260(r1), r3`
`l.lwz r3, -4(r1)`	`l.lwz r3, -4(r1)`
`l.j vPortMiscIntHandler`	`l.j vPortMiscIntHandler`
`l.nop`	`l.nop`


Line 160...	Line 160...
`.org 0xd00`	`.org 0xd00`
`_except_d00:`	`_except_d00:`
`l.nop`	`l.nop`
`l.sw -4(r1), r3`	`l.sw -4(r1), r3`
`l.addi r3, r0, 0xd00`	`l.addi r3, r0, 0xd00`
`l.sw -132(r1), r3`	`l.sw -260(r1), r3`
`l.lwz r3, -4(r1)`	`l.lwz r3, -4(r1)`
`l.j vPortMiscIntHandler`	`l.j vPortMiscIntHandler`
`l.nop`	`l.nop`


`.org 0xe00`	`.org 0xe00`
`_except_e00:`	`_except_e00:`
`l.nop`	`l.nop`
`l.sw -4(r1), r3`	`l.sw -4(r1), r3`
`l.addi r3, r0, 0xe00`	`l.addi r3, r0, 0xe00`
`l.sw -132(r1), r3`	`l.sw -260(r1), r3`
`l.lwz r3, -4(r1)`	`l.lwz r3, -4(r1)`
`l.j vPortMiscIntHandler`	`l.j vPortMiscIntHandler`
`l.nop`	`l.nop`


`.org 0xf00`	`.org 0xf00`
`_except_f00:`	`_except_f00:`
`l.nop`	`l.nop`
`l.sw -4(r1), r3`	`l.sw -4(r1), r3`
`l.addi r3, r0, 0xf00`	`l.addi r3, r0, 0xf00`
`l.sw -132(r1), r3`	`l.sw -260(r1), r3`
`l.lwz r3, -4(r1)`	`l.lwz r3, -4(r1)`
`l.j vPortMiscIntHandler`	`l.j vPortMiscIntHandler`
`l.nop`	`l.nop`

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Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [OpenRISC_SIM_GCC/] [arch/] [reset.S] - Diff between revs 621 and 675