URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [OpenRISC_SIM_GCC/] [drivers/] [uart.c] - Diff between revs 620 and 621

Rev 620	Rev 621
Line 33...	Line 33...

`/* Reset receiver and transmiter */`	`/* Reset receiver and transmiter */`
`/* Set RX interrupt for each byte */`	`/* Set RX interrupt for each byte */`
`REG8(UART_BASE + UART_FCR) = UART_FCR_ENABLE_FIFO \| UART_FCR_CLEAR_RCVR \| UART_FCR_CLEAR_XMIT \| UART_FCR_TRIGGER_1;`	`REG8(UART_BASE + UART_FCR) = UART_FCR_ENABLE_FIFO \| UART_FCR_CLEAR_RCVR \| UART_FCR_CLEAR_XMIT \| UART_FCR_TRIGGER_1;`

`/* Enable RX interrupt */`
`REG8(UART_BASE + UART_IER) = UART_IER_RDI \| UART_IER_THRI;`

`/* Set 8 bit char, 1 stop bit, no parity */`	`/* Set 8 bit char, 1 stop bit, no parity */`
`REG8(UART_BASE + UART_LCR) = UART_LCR_WLEN8 & ~(UART_LCR_STOP \| UART_LCR_PARITY);`	`REG8(UART_BASE + UART_LCR) = UART_LCR_WLEN8 & ~(UART_LCR_STOP \| UART_LCR_PARITY);`

`/* Set baud rate */`	`/* Set baud rate */`
`divisor = IN_CLK / (16 * UART_BAUD_RATE);`	`divisor = IN_CLK / (16 * UART_BAUD_RATE);`
Line 78...	Line 75...
`uart_putc(*p);`	`uart_putc(*p);`
`p++;`	`p++;`
`}`	`}`
`}`	`}`

`void uart_put_int(int n) {`	`void uart_print_int(int n) {`
`int a;`	`int a;`
`char c;`	`char c;`
`if (n<0) {`	`if (n<0) {`
`uart_putc('-');`	`uart_putc('-');`
`n = -n;`	`n = -n;`
`}`	`}`

`a = n/10;`	`a = n/10;`
`if(a) uart_put_int(a);`	`if(a) uart_print_int(a);`

`c = '0' + (n % 10);`	`c = '0' + (n % 10);`
`uart_putc(c);`	`uart_putc(c);`
`}`	`}`